Patents by Inventor Chien-Shen CHEN

Chien-Shen CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240371743
    Abstract: A semiconductor device includes a circuit substrate, at least one semiconductor die, a first frame, and a second frame. The at least one semiconductor die is connected to the circuit substrate. The first frame is disposed on the circuit substrate and encircles the at least one semiconductor die. The second frame is stacked on the first frame. The first frame includes a base portion and an overhang portion. The base portion has a first width. The overhang portion is disposed on the base portion and has a second width greater than the first width. The overhang portion laterally protrudes towards the at least one semiconductor die with respect to the base portion. The first width and the second width are measured in a protruding direction of the overhang portion.
    Type: Application
    Filed: July 18, 2024
    Publication date: November 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hung Chen, Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20240363517
    Abstract: A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.
    Type: Application
    Filed: July 8, 2024
    Publication date: October 31, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Sheng Lin, Han-Hsiang Huang, Chien-Sheng Chen, Shu-Shen Yeh, Shin-Puu Jeng
  • Patent number: 12119296
    Abstract: A semiconductor device includes a circuit substrate, at least one semiconductor die, a first frame, and a second frame. The at least one semiconductor die is connected to the circuit substrate. The first frame is disposed on the circuit substrate and encircles the at least one semiconductor die. The second frame is stacked on the first frame. The first frame includes a base portion and an overhang portion. The base portion has a first width. The overhang portion is disposed on the base portion and has a second width greater than the first width. The overhang portion laterally protrudes towards the at least one semiconductor die with respect to the base portion. The first width and the second width are measured in a protruding direction of the overhang portion.
    Type: Grant
    Filed: August 2, 2023
    Date of Patent: October 15, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Hung Chen, Shu-Shen Yeh, Yu-Sheng Lin, Po-Yao Lin, Shin-Puu Jeng
  • Publication number: 20240321500
    Abstract: A magnetic component includes a core, at least one coil, a first heat dissipating member and a second heat dissipating member. The core includes at least one outer leg and an inner leg. The at least one coil is wound around the inner leg. The first heat dissipating member is disposed on a first side and a top side of the core. The second heat dissipating member is disposed on a second side and the top side of the core. The first heat dissipating member and the second heat dissipating member have a first joint region, a second joint region and a third joint region on the top side. Projections of the first joint region and the second joint region do not overlap with the inner leg. A projection of at least one of the first heat dissipating member and the second heat dissipating member overlaps with the inner leg.
    Type: Application
    Filed: March 22, 2024
    Publication date: September 26, 2024
    Applicant: CYNTEC CO., LTD.
    Inventors: Yung-Shou Hsu, Chien-Lin Chen, Shao-Wei Chang, Chun-Ying Liao, Hsieh-Shen Hsieh, Ying-Teng Chang, Chia-Hao Yang
  • Publication number: 20240321498
    Abstract: A magnetic component includes a core and at least one coil. The core includes at least one outer leg and an inner leg. The inner leg is separated from an upper inner surface of the core. The inner leg is at least partially divided into a plurality of separated portions along a length direction of the inner leg. The at least one coil is wound around the inner leg.
    Type: Application
    Filed: March 21, 2024
    Publication date: September 26, 2024
    Applicant: CYNTEC CO., LTD.
    Inventors: Yung-Shou Hsu, Chien-Lin Chen, Shao-Wei Chang, Chun-Ying Liao, Hsieh-Shen Hsieh, Ying-Teng Chang, Chia-Hao Yang
  • Publication number: 20240312930
    Abstract: A semiconductor package includes a substrate, a semiconductor die, a ring structure and a lid. The semiconductor die is disposed on the substrate. The ring structure is disposed on the substrate and surrounds the semiconductor die, where a first side of the semiconductor die is distant from an inner sidewall of the ring structure by a first gap, and a second side of the semiconductor die is distant from the inner sidewall of the ring structure by a second gap. The first side is opposite to the second side, and the first gap is less than the second gap. The lid is disposed on the ring structure and has a recess formed therein, and the recess overlaps with the first gap in a stacking direction of the ring structure and the lid.
    Type: Application
    Filed: May 24, 2024
    Publication date: September 19, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Ching, Shu-Shen Yeh, Chien-Hung Chen, Hui-Chang Yu, Yu-Min Cheng
  • Publication number: 20240306106
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The method may be performed by a UE. In certain configurations, the UE receives, from a base station, a configuration instruction for enabling a subband full duplex (SBFD) timing alignment (TA) mechanism and a constant c. The UE enables the SBFD TA mechanism according to the configuration instruction. The UE receives, from the base station, a timing adjustment command, which includes a propagation delay ?i for the UE. The UE determines whether an uplink (UL) transmission is to be performed in a SBFD slot. In response to determining the UL transmission to be performed in the SBFD slot, the UE applies a timing alignment delay to the UL transmission with respect to the SBFD slot start boundary. The timing alignment delay is determined by both the constant c and the propagation delay ?i.
    Type: Application
    Filed: March 1, 2024
    Publication date: September 12, 2024
    Inventors: Rama Kiran, Jinesh Parameshwaran Nair, Chien-Hua Chen, Yih-Shen Chen, Chandrasekaran Mohandoss, Visanakarra Goraknath Guptha
  • Patent number: 12074101
    Abstract: A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.
    Type: Grant
    Filed: September 22, 2023
    Date of Patent: August 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Sheng Lin, Han-Hsiang Huang, Chien-Sheng Chen, Shu-Shen Yeh, Shin-Puu Jeng
  • Patent number: 11926017
    Abstract: A cleaning process monitoring system, comprising: a cleaning container comprising an inlet for receiving a cleaning solution and an outlet for draining a waste solution; a particle detector coupled to the outlet and configured to measure a plurality of particle parameters associated with the waste solution so as to provide a real-time monitoring of the cleaning process; a pump coupled to the cleaning container and configured to provide suction force to draw solution through the cleaning system; a controller coupled to the pump and the particle detector and configured to receive the plurality of particle parameters from the particle detector and to provide control to the cleaning system; and a host computer coupled to the controller and configured to provide at least one control parameter to the controller.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Charlie Wang, Yu-Ping Tseng, Y. J. Chen, Wai-Ming Yeung, Chien-Shen Chen, Danny Kuo, Yu-Hsuan Hsieh, Hsuan Lo
  • Publication number: 20230378007
    Abstract: A package assembly includes a package substrate, an interposer module on the package substrate, and a package lid on the interposer module and attached to the package substrate. The package lid includes an outer lid including an outer lid material and including an outer lid plate portion. The package lid further includes an inner lid including an inner lid material different than the outer lid material and including an inner lid plate portion attached to a bottom surface of the outer lid plate portion.
    Type: Application
    Filed: May 23, 2022
    Publication date: November 23, 2023
    Inventors: Yu-Sheng Lin, Shu-Shen Yeh, Chien-Shen Chen, Po-Yao Lin, Shin-Puu Jeng, Ming-Chih Yew, Chin-Hua Wang, Po-Chen Lai, Chia-Kuei Hsu
  • Publication number: 20210252668
    Abstract: A cleaning process monitoring system, comprising: a cleaning container comprising an inlet for receiving a cleaning solution and an outlet for draining a waste solution; a particle detector coupled to the outlet and configured to measure a plurality of particle parameters associated with the waste solution so as to provide a real-time monitoring of the cleaning process; a pump coupled to the cleaning container and configured to provide suction force to draw solution through the cleaning system; a controller coupled to the pump and the particle detector and configured to receive the plurality of particle parameters from the particle detector and to provide control to the cleaning system; and a host computer coupled to the controller and configured to provide at least one control parameter to the controller.
    Type: Application
    Filed: May 5, 2021
    Publication date: August 19, 2021
    Inventors: Charlie WANG, Yu-Ping TSENG, Y.J. CHEN, Wai-Ming YEUNG, Chien-Shen CHEN, Danny KUO, Yu-Hsuan HSIEH, Hsuan LO
  • Patent number: 11007620
    Abstract: A cleaning process monitoring system, comprising: a cleaning container comprising an inlet for receiving a cleaning solution and an outlet for draining a waste solution; a particle detector coupled to the outlet and configured to measure a plurality of particle parameters associated with the waste solution so as to provide a real-time monitoring of the cleaning process; a pump coupled to the cleaning container and configured to provide suction force to draw solution through the cleaning system; a controller coupled to the pump and the particle detector and configured to receive the plurality of particle parameters from the particle detector and to provide control to the cleaning system; and a host computer coupled to the controller and configured to provide at least one control parameter to the controller.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Charlie Wang, Yu-Ping Tseng, Y. J. Chen, Wai-Ming Yeung, Chien-Shen Chen, Danny Kuo, Yu-Hsuan Hsieh, Hsuan Lo
  • Publication number: 20190143481
    Abstract: A cleaning process monitoring system, comprising: a cleaning container comprising an inlet for receiving a cleaning solution and an outlet for draining a waste solution; a particle detector coupled to the outlet and configured to measure a plurality of particle parameters associated with the waste solution so as to provide a real-time monitoring of the cleaning process; a pump coupled to the cleaning container and configured to provide suction force to draw solution through the cleaning system; a controller coupled to the pump and the particle detector and configured to receive the plurality of particle parameters from the particle detector and to provide control to the cleaning system; and a host computer coupled to the controller and configured to provide at least one control parameter to the controller.
    Type: Application
    Filed: March 29, 2018
    Publication date: May 16, 2019
    Inventors: Charlie WANG, Yu-Ping TSENG, Y.J. CHEN, Wai-Ming YEUNG, Chien-Shen CHEN, Danny KUO, Yu-Hsuan HSIEH, Hsuan LO