Patents by Inventor Chien-Sheng Chen
Chien-Sheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230283180Abstract: A power source equipment is configured to provide a power to a powered device in a power over Ethernet. The power source equipment includes a first port, a second port, and a control circuit. The first port is configured to perform a power classification on the powered device, and provide a first voltage to the powered device in a first stage. The second port is configured to provide a second voltage to the powered device in a second stage. The control circuit is configured to disable the second port in the first stage, and configured to control the second port to output the second voltage and increase the first voltage in the second stage.Type: ApplicationFiled: February 27, 2023Publication date: September 7, 2023Inventor: CHIEN SHENG CHEN
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Publication number: 20230023268Abstract: A method includes forming an interconnect component including a plurality of dielectric layers that include an organic dielectric material, and a plurality of redistribution lines extending into the plurality of dielectric layers. The method further includes bonding a first package component and a second package component to the interconnect component, encapsulating the first package component and the second package component in an encapsulant, and precutting the interconnect component using a blade to form a trench. The trench penetrates through the interconnect component, and partially extends into the encapsulant. The method further includes performing a singulation process to separate the first package component and the second package component into a first package and a second package, respectively.Type: ApplicationFiled: March 15, 2022Publication date: January 26, 2023Inventors: Chipta Priya Laksana, Chun-Lung Jao, Shu-Shen Yeh, Chien-Sheng Chen, Shin-Puu Jeng
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Patent number: 11532593Abstract: A method includes bonding a first package component over a second package component. The second package component includes a plurality of dielectric layers, and a plurality of redistribution lines in the plurality of dielectric layers. The method further includes dispensing a stress absorber on the second package component, curing the stress absorber, and forming an encapsulant on the second package component and the stress absorber.Type: GrantFiled: January 14, 2021Date of Patent: December 20, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shin-Puu Jeng, Chien-Sheng Chen, Po-Yao Lin, Po-Chen Lai, Shu-Shen Yeh
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Publication number: 20220359457Abstract: A method includes bonding a first package component over a second package component. The second package component includes a plurality of dielectric layers, and a plurality of redistribution lines in the plurality of dielectric layers. The method further includes dispensing a stress absorber on the second package component, curing the stress absorber, and forming an encapsulant on the second package component and the stress absorber.Type: ApplicationFiled: July 25, 2022Publication date: November 10, 2022Inventors: Shin-Puu Jeng, Chien-Sheng Chen, Po-Yao Lin, Po-Chen Lai, Shu-Shen Yeh
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Publication number: 20220344174Abstract: Semiconductor devices and methods of manufactured are presented in which a first redistribution structure is formed, semiconductor devices are bonded to the first redistribution structure, and the semiconductor devices are encapsulated in an encapsulant. First openings are formed within the encapsulant, such as along corners of the encapsulant, in order to help relieve stress and reduce cracks.Type: ApplicationFiled: June 14, 2021Publication date: October 27, 2022Inventors: Po-Chen Lai, Ming-Chih Yew, Po-Yao Lin, Chien-Sheng Chen, Shin-Puu Jeng
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Publication number: 20220302011Abstract: A package structure includes a circuit substrate, a semiconductor package, first bump structures and second bump structures. The semiconductor package is disposed on the circuit substrate, wherein the semiconductor package includes a center region and side regions surrounding the center region. The first bump structures are disposed on the center region of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate. The second bump structures are disposed on the side regions of the semiconductor package and electrically connecting the semiconductor package to the circuit substrate, wherein the first bump structures and the second bump structures have different heights and different shapes.Type: ApplicationFiled: July 15, 2021Publication date: September 22, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Sheng Lin, Han-Hsiang Huang, Chien-Sheng Chen, Shu-Shen Yeh, Shin-Puu Jeng
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Publication number: 20220292039Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is coupled to a DP sink device through a DP connector. The USB core circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit supports only one specific conduction mode that only allows transmitting DP signals between the USB interface circuit and the DP interface circuit.Type: ApplicationFiled: May 30, 2022Publication date: September 15, 2022Applicant: VIA LABS, INC.Inventors: Cheng-Chung Lin, Hsiao-Chyi Lin, Yi-Shing Lin, Chien-Sheng Chen
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Patent number: 11386030Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is suitable for coupling to a DP connector. In a first operation mode, at least one USB signal pair received by the USB connector is transmitted to the USB core circuit through the USB interface circuit. The USB core circuit decodes the USB signal pair and generates DP data. The DP data is transmitted to the DP connector by the DP interface circuit. In a second operation mode, the DP data received by the USB connector is transmitted to the DP connector through the USB interface circuit, the switching circuit and the DP interface circuit.Type: GrantFiled: December 3, 2020Date of Patent: July 12, 2022Assignee: VIA LABS, INC.Inventors: Cheng-Chung Lin, Hsiao-Chyi Lin, Yi-Shing Lin, Chien-Sheng Chen
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Publication number: 20220102313Abstract: A method includes bonding a first package component over a second package component. The second package component includes a plurality of dielectric layers, and a plurality of redistribution lines in the plurality of dielectric layers. The method further includes dispensing a stress absorber on the second package component, curing the stress absorber, and forming an encapsulant on the second package component and the stress absorber.Type: ApplicationFiled: January 14, 2021Publication date: March 31, 2022Inventors: Shin-Puu Jeng, Chien-Sheng Chen, Po-Yao Lin, Po-Chen Lai, Shu-Shen Yeh
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Patent number: 11159251Abstract: An antenna control method comprises obtaining a plurality of radio frequency signal parameters respectively in a plurality of measuring beam directions, generating a plurality of parameter groups according to the plurality of radio frequency signal parameters, selecting a target beam direction from the plurality of measuring beam directions according to the plurality of parameter groups, and controlling an antenna to transmit and receive signals in the target beam direction. In said antenna control method, two adjacencies of the plurality of measuring beam directions have an angle difference therebetween, and each of the plurality of parameter groups comprises more than one of the plurality of radio frequency signal parameters.Type: GrantFiled: October 16, 2019Date of Patent: October 26, 2021Assignee: GEMTEK TECHNOLOGY CO., LTD.Inventors: Yu-Min Lin, Chien Sheng Chen
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Patent number: 11121629Abstract: A regulator device includes a first switch, a second switch, and a controlling circuit. A control terminal of the first switch is configured to receive a first control signal. A first terminal of the second switch is coupled with a second terminal of the first switch at a node. A control terminal of the second switch is configured to receive a second control signal. The controlling circuit is coupled to the control terminal of the first switch, the control terminal of the second switch, and the node. The controlling circuit outputs the first control signal with a first slope to the first switch during a first period, and outputs the first control signal with a second slope to the first switch during a second period. The first period is less than the second period, and the first slope is larger than the second slope.Type: GrantFiled: July 8, 2019Date of Patent: September 14, 2021Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Wei-Wen Ou, Shih-Chieh Chen, Chien-Sheng Chen
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Publication number: 20210271620Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is suitable for coupling to a DP connector. In a first operation mode, at least one USB signal pair received by the USB connector is transmitted to the USB core circuit through the USB interface circuit. The USB core circuit decodes the USB signal pair and generates DP data. The DP data is transmitted to the DP connector by the DP interface circuit. In a second operation mode, the DP data received by the USB connector is transmitted to the DP connector through the USB interface circuit, the switching circuit and the DP interface circuit.Type: ApplicationFiled: December 3, 2020Publication date: September 2, 2021Applicant: VIA LABS, INC.Inventors: Cheng-Chung Lin, Hsiao-Chyi Lin, Yi-Shing Lin, Chien-Sheng Chen
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Publication number: 20200328827Abstract: An antenna control method comprises obtaining a plurality of radio frequency signal parameters respectively in a plurality of measuring beam directions, generating a plurality of parameter groups according to the plurality of radio frequency signal parameters, selecting a target beam direction from the plurality of measuring beam directions according to the plurality of parameter groups, and controlling an antenna to transmit and receive signals in the target beam direction. In said antenna control method, two adjacencies of the plurality of measuring beam directions have an angle difference therebetween, and each of the plurality of parameter groups comprises more than one of the plurality of radio frequency signal parameters.Type: ApplicationFiled: October 16, 2019Publication date: October 15, 2020Inventors: YU-MIN LIN, CHIEN SHENG CHEN
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Publication number: 20200328681Abstract: A buck-boost switching regulating method includes outputting a mode signal according to an input voltage and an output voltage, generating one of a plurality of triangle waves according to the mode signal, comparing a feedback signal and a reference signal to generate an error signal, comparing the error signal and the generated triangle wave to output a comparison signal, and generating a set of switch signals according to the comparison signal. The feedback signal is related to the output voltage. The waveform of the triangle wave generated when the mode signal represents a buck-boost mode is larger than that when the mode signal represents a adjusting mode.Type: ApplicationFiled: April 10, 2020Publication date: October 15, 2020Applicant: REALTEK SEMICONDUCTOR CORP.Inventors: Wei-Wen Ou, Shih-Chieh Chen, Chien-Sheng Chen, Hung-Hsuan Cheng
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Patent number: 10771900Abstract: A speaker diaphragm structure is installed inside a sound generator device which comprises a frame, a speaker diaphragm structure installed within the frame and a suspension edge whose inner perimeter is connected to the speaker diaphragm structure and whose outer perimeter is connected to the frame; herein the speaker diaphragm structure includes a diaphragm body and a composite material layer, in which the composite material layer is used for bonding onto the surface of the diaphragm body or attaching within the diaphragm body; moreover, the composite material layer is composed of one or more types of tetrapyrrole compounds as well as one or more types of metal ions; additionally, the composite material layer has a thickness smaller than the thickness of the diaphragm body, and is mainly applied to provide the performance effect of sound quality modifications.Type: GrantFiled: August 19, 2019Date of Patent: September 8, 2020Assignees: FU JEN CATHOLIC UNIVERSITY, MICRO LITHOGRAPHY INC.Inventors: Ching-Bore Wang, Chien-Sheng Chen, Hao-Zhi Li, Wei-Jen Lee
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Patent number: 10756618Abstract: A regulator device includes a first switch, a second switch, a protecting circuit, and a driving circuit. The first switch is configured to receive power supply voltage. One terminal of the second switch and the first switch are coupled at a node. The other terminal of the second switch is coupled to ground. The protecting circuit is coupled to the node, and outputs at least one protecting signal according to the turn on/off state of the first switch and the second switch and the voltage of the node. The driving circuit is coupled to the first switch, the second switch, and the protecting circuit, and turns off the first switch or the second switch according the at least one protecting signal.Type: GrantFiled: June 28, 2019Date of Patent: August 25, 2020Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Wei-Wen Ou, Shih-Chieh Chen, Chien-Sheng Chen
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Publication number: 20200136499Abstract: A regulator device includes a first switch, a second switch, a protecting circuit, and a driving circuit. The first switch is configured to receive power supply voltage. One terminal of the second switch and the first switch are coupled at a node. The other terminal of the second switch is coupled to ground. The protecting circuit is coupled to the node, and outputs at least one protecting signal according to the turn on/off state of the first switch and the second switch and the voltage of the node. The driving circuit is coupled to the first switch, the second switch, and the protecting circuit, and turns off the first switch or the second switch according the at least one protecting signal.Type: ApplicationFiled: June 28, 2019Publication date: April 30, 2020Inventors: Wei-Wen OU, Shih-Chieh CHEN, Chien-Sheng CHEN
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Publication number: 20200136509Abstract: A regulator device includes a first switch, a second switch, and a controlling circuit. A control terminal of the first switch is configured to receive a first control signal. A first terminal of the second switch is coupled with a second terminal of the first switch at a node. A control terminal of the second switch is configured to receive a second control signal. The controlling circuit is coupled to the control terminal of the first switch, the control terminal of the second switch, and the node. The controlling circuit outputs the first control signal with a first slop to the first switch during a first period, and outputs the first control signal with a second slop to the first switch during a second period. The first period is less than the second period, and the first slope is larger than the second slope.Type: ApplicationFiled: July 8, 2019Publication date: April 30, 2020Inventors: Wei-Wen OU, Shih-Chieh CHEN, Chien-Sheng CHEN
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Publication number: 20200077195Abstract: A speaker diaphragm structure is installed inside a sound generator device which comprises a frame, a speaker diaphragm structure installed within the frame and a suspension edge whose inner perimeter is connected to the speaker diaphragm structure and whose outer perimeter is connected to the frame; herein the speaker diaphragm structure includes a diaphragm body and a composite material layer, in which the composite material layer is used for bonding onto the surface of the diaphragm body or attaching within the diaphragm body; moreover, the composite material layer is composed of one or more types of tetrapyrrole compounds as well as one or more types of metal ions; additionally, the composite material layer has a thickness smaller than the thickness of the diaphragm body, and is mainly applied to provide the performance effect of sound quality modifications.Type: ApplicationFiled: August 19, 2019Publication date: March 5, 2020Inventors: Ching-Bore WANG, Chien-Sheng CHEN, Hao-Zhi LI, Wei-Jen LEE
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Patent number: 10535990Abstract: A power supply device includes a power supply circuit, a detection circuit, and a control circuit. The power supply circuit is configured to output a supply voltage. The detection circuit is configured to sequentially provide a first predetermined resistance and a second predetermined resistance according to a plurality of switching signals, in order to operate with an electronic device and the supply voltage to sequentially obtain a first detection voltage and a second detection voltage. The control circuit is configured to generate the switching signals, and determine a load resistance of the electronic device according to the first detection voltage and the second detection voltage. The control circuit is further configured to determine whether the load resistance is within a predetermined resistance range, and the power supply circuit is further configured to drive the electronic device if the load resistance is within the predetermined resistance range.Type: GrantFiled: May 1, 2017Date of Patent: January 14, 2020Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Chien-Sheng Chen, Jian-Ru Lin, Chih-Cheng Lin, Rui Wang