Abstract: Semiconductor devices and methods of manufactured are presented in which a first redistribution structure is formed, semiconductor devices are bonded to the first redistribution structure, and the semiconductor devices are encapsulated in an encapsulant. First openings are formed within the encapsulant, such as along corners of the encapsulant, in order to help relieve stress and reduce cracks.

Abstract: Various solutions for enhanced user equipment (UE) route selection policy (URSP) with green incentives for environmental conservation are described. An apparatus may receive information of an application associated with one or more eco-friendly requirements. Then, the apparatus may select a URSP rule from a list of URSP rules, and the selected URSP rule includes one or more descriptors matching the one or more eco-friendly requirements. Also, the apparatus may determine a data session for routing traffic of the application between the apparatus and a wireless network based on one or more parameters included in a route selection descriptor (RSD) of the selected URSP rule.

Abstract: Disclosed is an optical module, including a lower housing, an upper housing covering the lower housing, a circuit board, a first metal base, a second metal base, a silicon photonic chip, and a light emission module including a laser chip and an optical path assembly. The first metal base is disposed on one side of the upper housing. The second metal base is disposed on one side of the lower housing. The circuit board with a hollow region is disposed on the second metal base. The silicon photonic chip is disposed on the second metal base exposed from the hollow region. The laser chip is disposed on the first metal base. The optical path assembly is disposed on the first metal base and/or on the second metal base exposed from the hollow region, and guides a third optical signal emitted by the laser chip to the silicon photonic chip.

Abstract: Various embodiments of the present disclosure are directed towards a shared frontside pad/bridge layout for a three-dimensional (3D) integrated circuit (IC), as well as the 3D IC and a method for forming the 3D IC. A second IC die underlies the first IC die, and a third IC die underlies the second IC die. A first-die backside pad, a second-die backside pad, and a third die backside pad are in a row extending in a dimension and overlie the first, second, and third IC dies. Further, the first-die, second-die, and third-die backside pads are electrically coupled respectively to individual semiconductor devices of the first, second, and third IC dies. The second and third IC dies include individual pad/bridge structures at top metal (TM) layers of corresponding interconnect structures. The pad/bridge structures share the shared frontside pad/bridge layout and provide lateral routing in the dimension for the aforementioned electrical coupling.

Abstract: A coil module is provided, including a second coil mechanism. The second coil mechanism includes a third coil assembly and a second base corresponding to the third coil assembly. The second base has a positioning assembly corresponding to a first coil mechanism.

Abstract: An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface.

Abstract: A semiconductor device includes a first channel region disposed over a substrate, and a first gate structure disposed over the first channel region. The first gate structure includes a gate dielectric layer disposed over the channel region, a lower conductive gate layer disposed over the gate dielectric layer, a ferroelectric material layer disposed over the lower conductive gate layer, and an upper conductive gate layer disposed over the ferroelectric material layer. The ferroelectric material layer is in direct contact with the gate dielectric layer and the lower gate conductive layer, and has a U-shape cross section.

Abstract: Provided are a silicon carbide crystal growth device and a quality control method. The device includes: an annealing unit, a crystal growth unit, an atmosphere control unit, and a transport system; the atmosphere control unit provides a gas environment with low water, oxygen and nitrogen; the transport system transports a plurality of target objects after high-temperature purification by the annealing unit to the atmosphere control unit; after assembling silicon carbide seed crystal and silicon carbide powder in a graphite crucible and covering with thermal insulation material to form a container inside the atmosphere control unit, the transport system transports the container to the crystal growth unit. The method uses a weighing system in a chamber of the crystal growth unit to detect a weight change of silicon carbide seed crystal and silicon carbide powder during a crystal growth process through a plurality of weight sensors of the weighing system.

Abstract: Disclosed are a co-packaged integrated optoelectronic module and a co-packaged optoelectronic switch chip. The co-packaged integrated optoelectronic module includes a carrier board, and an optoelectronic submodule, a slave microprocessor and a master microprocessor disposed on and electrically connected to the carrier board. In the optoelectronic submodule, a digital signal processing chip converts an electrical analog signal into an electrical digital signal, an optoelectronic signal analog conversion chip converts an optical analog signal into the electrical analog signal to the digital signal processing chip, and an optical transceiver chip receives and transmits the optical analog signal to the optoelectronic signal analog conversion chip. The slave microprocessor monitors operation of the optoelectronic submodule.

Abstract: A method of adaptively controlling a brushless DC motor includes steps of: controlling the brushless DC motor rotating at a first speed according to an operation curve, accumulating a running time of the brushless DC motor, estimating a remaining used time of a bearing of the brushless DC motor according to the accumulated running time, executing an alarm operation when the remaining used time is less than a predetermined time, and decreasing the speed of the brushless DC motor to run at a second speed to prolong the used time of the bearing.

Abstract: A fan management system includes a fan and a server. The fan includes a driving circuit, and the driving circuit is configured for driving the fan. The fan operates in an operation mode. The server is connected to the fan and is configured for controlling the operation of the fan. The driving circuit outputs a digital label signal when the fan operates abnormally, and the server obtains a production history, an operation information and a warning message of the fan through the digital label signal. The server adjusts the operation mode of the fan according to the warning message simultaneously.

Abstract: A method of adaptively controlling a brushless DC motor includes steps of: controlling the brushless DC motor rotating at a first speed according to an operation curve, accumulating a running time of the brushless DC motor, estimating a remaining used time of a bearing of the brushless DC motor according to the accumulated running time, executing an alarm operation when the remaining used time is less than a predetermined time, and decreasing the speed of the brushless DC motor to run at a second speed to prolong the used time of the bearing.

Abstract: A heat dissipation apparatus with energy-saving effect is coupled to an operation unit, and the heat dissipation apparatus includes a control unit and a drive circuit. The control unit determines whether the operation unit enters an energy-saving mode according to a first signal provided by the operation unit. The control unit shields a plurality of second signals provided to the drive circuit according to the energy-saving mode. The drive circuit does not drive the heat dissipation unit and the heat dissipation unit enters an inertia deceleration.

Abstract: A fan management system includes a fan and a server. The fan includes a driving circuit, and the driving circuit is configured for driving the fan. The fan operates in an operation mode. The server is connected to the fan and is configured for controlling the operation of the fan. The driving circuit outputs a digital label signal when the fan operates abnormally, and the server obtains a production history, an operation information and a warning message of the fan through the digital label signal. The server adjusts the operation mode of the fan according to the warning message simultaneously.

Abstract: A method of estimating used time of a brushless DC motor is provided. The method includes steps of: calculating a running time of the brushless DC motor when the brushless DC motor is in a normal operation state, recording the running time when the brushless DC motor is in an abnormal operation state, updating an accumulated running time, estimating a used time of a bearing of the brushless DC motor according to the accumulated running time, and determining a life span of the bearing according to the used time of the bearing.

Abstract: A heat dissipation apparatus with energy-saving effect is coupled to an operation unit, and the heat dissipation apparatus includes a control unit and a drive circuit. The control unit determines whether the operation unit enters an energy-saving mode according to a first signal provided by the operation unit. The control unit shields a plurality of second signals provided to the drive circuit according to the energy-saving mode. The drive circuit does not drive the heat dissipation unit and the heat dissipation unit enters an inertia deceleration.

Abstract: A brushless DC motor with automatic record of abnormal operation includes an integrated circuit chip electrically connected to a drive circuit of the brushless DC motor. The integrated circuit chip includes a central processing unit, and a flash memory and a detection unit connected to the central processing unit. When the detection unit receives a detection signal from the drive circuit and the central processing unit determines that the brushless DC motor is in an abnormal operation state, the central processing unit generates an abnormal operation data including an error code so that the flash memory automatically stores the abnormal operation data. The present disclosure further includes a method of automatically recording abnormality for the brushless DC motor.

Abstract: A motor drive circuit including a back electromotive force detecting module and a processing module is disclosed herein. The back electromotive force detecting module is electrically connected to a single phase DC motor and is configured to detect a back electromotive force of the single phase DC motor and to output a detecting signal correspondingly. The processing module is electrically connected to the back electromotive force detecting module and the single phase DC motor. The processing module is configured to determine the rotation direction of the single phase DC motor according to the detecting signal and a hall signal outputted by a hall element located in the single phase DC motor, and is configured to control the single phase DC motor.

Abstract: A single phase brushless DC motor comprises a Hall effect sensor, a coil assembly and a motor control circuit which generating a driving signal to guide a coil current flowing through the coil assembly. The Hall effect sensor senses the magnetic pole of the rotor to accordingly generate a Hall effect signal. The motor control circuit outputs a current polarity reverse signal according to the voltage at one end of the coil assembly. The time when the current polarity reverse signal is generated corresponds to the polarity reverse time of the coil current. The motor control circuit adjusts the phase of the driving signal according to the polarity reverse time of the Hall effect signal and the time when the current polarity reverse signal is generated to synchronize the phase of the back emf of the single phase brushless DC motor with the phase of the coil current.

Abstract: A single phase brushless DC motor comprises a Hall effect sensor, a coil assembly and a motor control circuit which generating a driving signal to guide a coil current flowing through the coil assembly. The Hall effect sensor senses the magnetic pole of the rotor to accordingly generate a Hall effect signal. The motor control circuit outputs a current polarity reverse signal according to the voltage at one end of the coil assembly. The time when the current polarity reverse signal is generated corresponds to the polarity reverse time of the coil current. The motor control circuit adjusts the phase of the driving signal according to the polarity reverse time of the Hall effect signal and the time when the current polarity reverse signal is generated to synchronize the phase of the back emf of the single phase brushless DC motor with the phase of the coil current.