Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a first capacitor conductor disposed over an isolation structure arranged within a substrate. The isolation structure laterally extends past opposing outer sidewalls of the first capacitor conductor. A capacitor dielectric is arranged along one of the opposing outer sidewalls of the first capacitor conductor and over a top surface of the first capacitor conductor. A second capacitor conductor is arranged along an outer sidewall of the capacitor dielectric and over a top surface of the capacitor dielectric. The second capacitor conductor laterally overlaps parts of both the capacitor dielectric and the first capacitor conductor.

Abstract: A gate oxide layer for a high voltage transistor is formed using methods that avoid thinning in the corners of the gate oxide layer. A recess is formed in a silicon substrate. The exposed surfaces of the recess are thermally oxidized to form a thermal oxide layer of the gate oxide layer. A high temperature oxide layer of the gate oxide layer is then formed within the exposed surfaces of the recess by chemical vapor deposition. The combination of the thermal oxide layer and the high temperature oxide layer results in a gate oxide layer that does not exhibit the double hump phenomenon in the drain current vs. gate voltage curve. The high temperature oxide layer may include a rim that extends out of the recess.

Abstract: In a method of manufacturing a semiconductor device, a magnetic random access memory (MRAM) cell structure is formed. The MRAM cell structure includes a bottom electrode, a magnetic tunnel junction (MTJ) stack and a top electrode. A first insulating cover layer is formed over the MRAM cell structure. A second insulating cover layer is formed over the first insulating cover layer. An interlayer dielectric (ILD) layer is formed. A contact opening in the ILD layer is formed, thereby exposing the second insulating cover layer. A part of the second insulating cover layer and a part of the first insulating cover layer are removed, thereby exposing the top electrode. A conductive layer is formed in the opening contacting the top electrode.

Abstract: Some embodiments relate to an integrated circuit device incorporating an etched recessed gate dielectric region. The integrated circuit device includes a substrate including a first upper surface, a gate dielectric region disposed at the first upper surface of the substrate and extending into the substrate, and a gate structure disposed over the gate dielectric region. The gate dielectric region includes a second upper surface and forms a recess extending below the second upper surface. The second upper surface includes a perimeter portion surrounding the recess. The gate structure completely covers the second upper surface of the gate dielectric region and extends into the recess.

Abstract: Semiconductor structure and methods of forming the same are provided. An exemplary method includes providing a substrate having a first region and a second region, forming an array of memory cells over the first region of the substrate, and forming a memory-level dielectric layer around the array of memory cells. Each of the memory cells includes, from bottom to top, a bottom electrode, a memory material layer stack, and a top electrode. The exemplary method also includes forming a metal line directly interfacing a respective row of top electrodes of the array of memory cells. The metal line also directly interfaces a top surface of the memory-level dielectric layer.

Abstract: A device includes a bottom transistor, a top transistor, and an epitaxial isolation structure. The bottom transistor includes a first channel layer, first source/drain epitaxial structures, and a first gate structure. The first source/drain epitaxial structures are on opposite sides of the first channel layer. The first gate structure is around the first channel layer. The top transistor is over the bottom transistor and includes a second channel layer, second source/drain epitaxial structures, and a second gate structure. The second source/drain epitaxial structures are on opposite sides of the second channel layer. The second gate structure is around the second channel layer. The epitaxial isolation structure is between and in contact with one of the first source/drain epitaxial structures and one of the second source/drain epitaxial structures, such that the one of the first source/drain epitaxial structures is electrically isolated from the one of the second source/drain epitaxial structures.

Abstract: A manufacturing method of a semiconductor structure includes at least the following steps. A memory device is formed in an interconnect structure over a substrate. Forming the memory device includes forming an alternating stack of dielectric material layers and conductive material layers, wherein the alternating stack includes a memory array region and a staircase region adjacent to the memory array region; forming a trench on the memory array region of the alternating stack; forming a data storage layer, channel layers, bit line pillars, and source line pillars in the trench; and performing patterning processes to from a staircase structure on the staircase region. The staircase structure steps downward from a first direction and makes a 180-degree turn to step downward in a second direction opposite to the first direction.

Abstract: A memory device includes a bottom electrode contact, a magnetic tunnel junction pattern, a protection insulating layer, a first capping layer, an interlayer insulating layer, and a second capping layer. The magnetic tunnel junction pattern is over the bottom electrode contact. The protection insulating layer surrounds the magnetic tunnel junction pattern. The first capping layer surrounds the protection insulating layer. The interlayer insulating layer surrounds the first capping layer. The second capping layer is over the first capping layer and the interlayer insulating layer.

Abstract: An optical transceiver includes a housing and an optical transceiving module. The housing includes a main body and a heat conductive component. The heat conductive component is disposed on the main body, and a thermal conductivity of the heat conductive component is larger than a thermal conductivity of the main body. The optical transceiving module is disposed in an accommodation space of the main body of the housing.

Abstract: An optical transceiver includes a housing and an optical transceiving module. The housing includes a main body and a heat conductive component. The heat conductive component is disposed on the main body, and a thermal conductivity of the heat conductive component is larger than a thermal conductivity of the main body. The optical transceiving module is disposed in an accommodation space of the main body of the housing.

Abstract: An optical transceiver includes a photoelectric converter, an interposer and a circuit board. The interposer is disposed on the photoelectric converter. The interposer includes a board member and a flexible electrically conductive member disposed on the board member, and the photoelectric converter is electrically connected to the flexible electrically conductive member. The circuit board is disposed on a side of the interposer. The flexible electrically conductive member is remove-ably pressed against the circuit board so that the flexible conductive member is electrically connected to the circuit board.

Abstract: An optical transceiver includes a photoelectric converter, an interposer and a circuit board. The interposer is disposed on the photoelectric converter. The interposer includes a board member and a flexible electrically conductive member disposed on the board member, and the photoelectric converter is electrically connected to the flexible electrically conductive member. The circuit board is disposed on a side of the interposer. The flexible electrically conductive member is remove-ably pressed against the circuit board so that the flexible conductive member is electrically connected to the circuit board.

Abstract: A pluggable optical transceiver module for being plugged in a housing is provided. The housing has a cover and an elastic piece, and the cover has an accommodating space. One end of the elastic piece is connected to the cover while the other end has a first fastening portion. The first fastening portion is located on one side of the accommodating space. The pluggable optical transceiver module comprises a base and a sliding member. The base comprises a base body and a second fastening portion. The base body has a guide surface, and the second fastening portion is next to the guide surface. The base is for being plugged in the accommodating space, and the second fastening portion is fastened with the first fastening portion. The sliding member comprises a body section and a push section connected to each other. The body section is slidably disposed on the base.

Abstract: A pluggable optical transceiver module for inserted into plugging slot includes main body and sliding component. The main body has opposite two side surfaces and two sliding slots. The two sliding slots are located at the two side surfaces. The sliding component includes linkage arm and two extending arms. The two extending arms are connected to the linkage arm. Each extending arm has a second fastening part. The main body is between the two extending arms. The two extending arms are disposed on the two sliding slots to have fastening position and releasing position. Two first fastening parts are fastened to the two second fastening parts when the two extending arms are located at fastening position. The two second fastening parts press the two first fastening parts, respectively, for the two first fastening parts being farther from each other when the two extending arms are located at releasing position.

Abstract: A pluggable optical transceiver module for being plugged in a housing is provided. The housing has a cover and an elastic piece, and the cover has an accommodating space. One end of the elastic piece is connected to the cover while the other end has a first fastening portion. The first fastening portion is located on one side of the accommodating space. The pluggable optical transceiver module comprises a base and a sliding member. The base comprises a base body and a second fastening portion. The base body has a guide surface, and the second fastening portion is next to the guide surface. The base is for being plugged in the accommodating space, and the second fastening portion is fastened with the first fastening portion. The sliding member comprises a body section and a push section connected to each other. The body section is slidably disposed on the base.

Abstract: A pluggable optical transceiver module for inserted into plugging slot includes main body and sliding component. The main body has opposite two side surfaces and two sliding slots. The two sliding slots are located at the two side surfaces. The sliding component includes linkage arm and two extending arms. The two extending arms are connected to the linkage arm. Each extending arm has a second fastening part. The main body is between the two extending arms. The two extending arms are disposed on the two sliding slots to have fastening position and releasing position. Two first fastening parts are fastened to the two second fastening parts when the two extending arms are located at fastening position. The two second fastening parts press the two first fastening parts, respectively, for the two first fastening parts being farther from each other when the two extending arms are located at releasing position.