Patents by Inventor Chien-Ting Huang

Chien-Ting Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250085622
    Abstract: EUV masks and methods of fabrication thereof are described herein. An exemplary method includes receiving an EUV mask having a multilayer structure, a capping layer disposed over the multilayer structure, a patterned absorber layer disposed over the capping layer, and a patterned hard mask disposed over the patterned absorber layer. The method further includes removing the patterned hard mask by performing a first etching process to partially remove the patterned hard mask and performing a second etching process to remove a remainder of the patterned hard mask. The first etching process uses a first etchant, and the second etching process uses a second etchant. The second etchant is different than the first etchant. In some embodiments, the first etchant is a halogen-based plasma (e.g., a Cl2 plasma), and the second etchant is a halogen-and-oxygen-based plasma (e.g., a Cl2+O2 plasma).
    Type: Application
    Filed: January 18, 2024
    Publication date: March 13, 2025
    Inventors: Chun-Lang CHEN, Chung-Yang HUANG, Shih-Hao YANG, Chien-Yun HUANG, Wei-Ting CHEN
  • Patent number: 12219879
    Abstract: A method includes forming Magnetic Tunnel Junction (MTJ) stack layers, which includes depositing a bottom electrode layer; depositing a bottom magnetic electrode layer over the bottom electrode layer; depositing a tunnel barrier layer over the bottom magnetic electrode layer; depositing a top magnetic electrode layer over the tunnel barrier layer; and depositing a top electrode layer over the top magnetic electrode layer. The method further includes patterning the MTJ stack layers to form a MTJ; and performing a passivation process on a sidewall of the MTJ to form a protection layer. The passivation process includes reacting sidewall surface portions of the MTJ with a process gas comprising elements selected from the group consisting of oxygen, nitrogen, carbon, and combinations thereof.
    Type: Grant
    Filed: November 28, 2023
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tai-Yen Peng, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien Chung Huang, Han-Ting Lin, Jyu-Horng Shieh, Qiang Fu
  • Patent number: 12204163
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: February 5, 2024
    Date of Patent: January 21, 2025
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 10991422
    Abstract: High-efficiency control technology for non-volatile memory. A non-volatile memory has single level cells (SLCs) and multiple level cells (e.g., MLCs or TLCs) and is controlled by a controller. According to the controller at the device end, a host allocates a system memory to provide a host memory buffer (HMB). The controller at the device end uses the HMB to buffer write data issued by the host, and then flushes the write data from the HMB to multi-level cells of the non-volatile memory without passing single level cells of the non-volatile memory to reduce write amplification problems due to the frequent use of the single-level cells.
    Type: Grant
    Filed: July 28, 2019
    Date of Patent: April 27, 2021
    Assignee: SILICON MOTION, INC.
    Inventors: Chien-Ting Huang, Liang-Cheng Chen
  • Patent number: 10965005
    Abstract: A communication device includes a nonconductive housing, a cable, an antenna structure, and a signal source. The nonconductive housing has a hollow structure. The cable is coupled to the signal source. The cable includes a signaling conductor and a grounding conductor. The antenna structure includes an antenna body and an enclosed radiation element. The antenna body is coupled to the signaling conductor. The antenna body is disposed outside the nonconductive housing. The enclosed radiation element is coupled to the grounding conductor. The enclosed radiation element is disposed inside the nonconductive housing.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: March 30, 2021
    Assignee: WISTRON NEWEB CORP.
    Inventors: Chun-Lin Huang, Chien-Ting Huang
  • Publication number: 20200287273
    Abstract: A communication device includes a nonconductive housing, a cable, an antenna structure, and a signal source. The nonconductive housing has a hollow structure. The cable is coupled to the signal source. The cable includes a signaling conductor and a grounding conductor. The antenna structure includes an antenna body and an enclosed radiation element. The antenna body is coupled to the signaling conductor. The antenna body is disposed outside the nonconductive housing. The enclosed radiation element is coupled to the grounding conductor. The enclosed radiation element is disposed inside the nonconductive housing.
    Type: Application
    Filed: November 13, 2019
    Publication date: September 10, 2020
    Inventors: Chun-Lin HUANG, Chien-Ting HUANG
  • Patent number: 10615493
    Abstract: An antenna structure includes a ground plane, a dielectric substrate, a first radiation element, a second radiation element, a third radiation element, and a fourth radiation element. The first radiation element is coupled to a signal source. Both the third radiation element and the fourth radiation element are coupled between the first radiation element and the second radiation element. The third radiation element has a first notch and a second notch. The fourth radiation element has a third notch and a fourth notch. A loop structure is formed by the first radiation element, the second radiation element, the third radiation element, and the fourth radiation element. A fifth notch is formed between the first radiation element and the third radiation element. A sixth notch is formed between the first radiation element and the fourth radiation element.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: April 7, 2020
    Assignee: WISTRON NEWEB CORP.
    Inventors: Chun-Lin Huang, Chien-Ting Huang
  • Publication number: 20200098423
    Abstract: High-efficiency control technology for non-volatile memory. A non-volatile memory has single level cells (SLCs) and multiple level cells (e.g., MLCs or TLCs) and is controlled by a controller. According to the controller at the device end, a host allocates a system memory to provide a host memory buffer (HMB). The controller at the device end uses the HMB to buffer write data issued by the host, and then flushes the write data from the HMB to multi-level cells of the non-volatile memory without passing single level cells of the non-volatile memory to reduce write amplification problems due to the frequent use of the single-level cells.
    Type: Application
    Filed: July 28, 2019
    Publication date: March 26, 2020
    Inventors: Chien-Ting HUANG, Liang-Cheng CHEN
  • Publication number: 20200083599
    Abstract: An antenna structure includes a ground plane, a dielectric substrate, a first radiation element, a second radiation element, a third radiation element, and a fourth radiation element. The first radiation element is coupled to a signal source. Both the third radiation element and the fourth radiation element are coupled between the first radiation element and the second radiation element. The third radiation element has a first notch and a second notch. The fourth radiation element has a third notch and a fourth notch. A loop structure is formed by the first radiation element, the second radiation element, the third radiation element, and the fourth radiation element. A fifth notch is formed between the first radiation element and the third radiation element. A sixth notch is formed between the first radiation element and the fourth radiation element.
    Type: Application
    Filed: August 19, 2019
    Publication date: March 12, 2020
    Inventors: Chun-Lin HUANG, Chien-Ting HUANG
  • Patent number: 9590304
    Abstract: A broadband antenna includes a substrate; a grounding unit; a first radiating element, including a first segment and a second segment substantially perpendicular to each other, wherein the first segment is electrically connected to the grounding unit and the second segment extends toward a direction; a second radiating element, coupled to the first radiating element; a third radiating element having a terminal coupled to or electrically connected to the second radiating element and another terminal electrically connected to the grounding unit; and a signal feed-in element electrically connected to the third radiating element for transmitting or receiving a radio signal; where the first, the second and the third radiating elements are disposed on the substrate along the direction defined by an order of the first segment of the first radiating element, the second radiating element and the third radiating element.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: March 7, 2017
    Assignee: Wistron NeWeb Corporation
    Inventors: Shang-Sian You, Chien-Ting Huang, Chih-Ming Wang
  • Patent number: 9570162
    Abstract: The invention provides a data read method. In one embodiment, a flash memory comprises a plurality of pages, and predetermined information is written into each of the pages of the flash memory. First, a target address of the flash memory is read according to a source read voltage to obtain source data and a source error correction code. When error bits of the source data cannot be corrected according to the source error correction code, the predetermined information corresponding to the source data is read from the flash memory according to the source read voltage to obtain correction information. The source data and the source error correction code are then amended according to the difference between the predetermined information and the correction information to obtain an amended data and an amended error correction code. Error bits of the amended data are then corrected according to the amended error correction code.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: February 14, 2017
    Assignee: SILICON MOTION, INC.
    Inventor: Chien-Ting Huang
  • Patent number: 9401543
    Abstract: A broadband antenna for a wireless communication device includes a grounding unit for grounding; a first radiating element; a second radiating element electrically connected to the grounding unit; a signal feed-in element for transmitting a radio signal to the first radiating element in order to emit the radio signal via the first radiating element; and a passive component comprising an inductor, where the passive component is electrically connected between the first and the second radiating elements to work in conjunction with the first radiating element, the second radiating element and the grounding unit to form a loop antenna effect.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: July 26, 2016
    Assignee: Wistron NeWeb Corporation
    Inventors: Shang-Sian You, Chien-Ting Huang
  • Publication number: 20150236422
    Abstract: A broadband antenna includes a substrate; a grounding unit; a first radiating element, including a first segment and a second segment substantially perpendicular to each other, wherein the first segment is electrically connected to the grounding unit and the second segment extends toward a direction; a second radiating element, coupled to the first radiating element; a third radiating element having a terminal coupled to or electrically connected to the second radiating element and another terminal electrically connected to the grounding unit; and a signal feed-in element electrically connected to the third radiating element for transmitting or receiving a radio signal; where the first, the second and the third radiating elements are disposed on the substrate along the direction defined by an order of the first segment of the first radiating element, the second radiating element and the third radiating element.
    Type: Application
    Filed: January 22, 2015
    Publication date: August 20, 2015
    Inventors: Shang-Sian You, Chien-Ting Huang, Chih-Ming Wang
  • Publication number: 20150200456
    Abstract: A broadband antenna for a wireless communication device includes a grounding unit for grounding; a first radiating element; a second radiating element electrically connected to the grounding unit; a signal feed-in element for transmitting a radio signal to the first radiating element in order to emit the radio signal via the first radiating element; and a passive component comprising an inductor, where the passive component is electrically connected between the first and the second radiating elements to work in conjunction with the first radiating element, the second radiating element and the grounding unit to form a loop antenna effect.
    Type: Application
    Filed: August 20, 2014
    Publication date: July 16, 2015
    Inventors: Shang-Sian You, Chien-Ting Huang
  • Patent number: 8909846
    Abstract: A control method of a memory storage device for writing an updated data from a host to the memory storage device is provided. The memory storage device provides storage space which is divided into a plurality of physical blocks to access the updated data. The control method includes the following steps: first, determining whether the updated data is a hot data or not; finally, storing the less updated data which is not the hot data into the physical block which has the higher erase counts according to the result of above determination.
    Type: Grant
    Filed: January 21, 2009
    Date of Patent: December 9, 2014
    Assignee: A-Data Technology Co., Ltd.
    Inventors: Li-Pin Chang, Ming-Dar Chen, Chien-Ting Huang
  • Patent number: 8103821
    Abstract: A flash memory device with a wear-leveling mechanism includes at least one flash memory, a hot list, a bitmap, a source pointer, and a controller. The controller obtains a physical memory block with high erase count through the hot list, an erase count of the physical memory block, and an overall average erase count of the flash memory device. The controller further finds out a physical memory block which stores static data through managing the bitmap and the source pointer. The controller moves the static data to the physical memory block with high erase count, and releases the physical memory block which stores the static data to avoid the physical memory block with high erase count being worn down increasingly more seriously.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: January 24, 2012
    Assignee: A-Data Technology Co., Ltd.
    Inventors: Li-Pin Chang, Ming-Dar Chen, Chien-Ting Huang
  • Publication number: 20110179306
    Abstract: The invention provides a data read method. In one embodiment, a flash memory comprises a plurality of pages, and predetermined information is written into each of the pages of the flash memory. First, a target address of the flash memory is read according to a source read voltage to obtain source data and a source error correction code. When error bits of the source data cannot be corrected according to the source error correction code, the predetermined information corresponding to the source data is read from the flash memory according to the source read voltage to obtain correction information. The source data and the source error correction code are then amended according to the difference between the predetermined information and the correction information to obtain an amended data and an amended error correction code. Error bits of the amended data are then corrected according to the amended error correction code.
    Type: Application
    Filed: March 29, 2011
    Publication date: July 21, 2011
    Applicant: SILICON MOTION, INC.
    Inventor: Chien-Ting Huang
  • Publication number: 20100115186
    Abstract: A flash memory device with a wear-levelining mechanism includes at least one flash memory, a hot list, a bitmap, a source pointer, and a controller. The controller obtains a physical memory block with high erase count through the hot list, an erase count of the physical memory block, and an overall average erase count of the flash memory device. The controller further finds out a physical memory block which stores static data through managing the bitmap and the source pointer. The controller moves the static data to the physical memory block with high erase count, and releases the physical memory block which stores the static data to avoid the physical memory block with high erase count being worn down increasingly more seriously.
    Type: Application
    Filed: March 3, 2009
    Publication date: May 6, 2010
    Inventors: Li-Pin Chang, Ming-Dar Chen, Chien-Ting Huang
  • Publication number: 20100017555
    Abstract: A control method of a memory storage device for writing an updated data from a host to the memory storage device is provided. The memory storage device provides storage space which is divided into a plurality of physical blocks to access the updated data. The control method includes the following steps: first, determining whether the updated data is a hot data or not; finally, storing the less updated data which is not the hot data into the physical block which has the higher erase counts according to the result of above determination.
    Type: Application
    Filed: January 21, 2009
    Publication date: January 21, 2010
    Inventors: Li-Pin Chang, Ming-Dar Chen, Chien-Ting Huang