Patents by Inventor Chien-Yi Hsu

Chien-Yi Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10255224
    Abstract: An intelligent PCIe slot lane assignment method applied to a motherboard including a CPU capable of providing at least 16 lanes, a switch circuit, a PCIe slot assembly consisting of a first PCIe slot, a second PCIe slot and a third PCIe slot, and a logic controller. The intelligent control of the logic controller in detection of the insertion of a PCIe expansion card in the first PCIe slot, second PCIe slot and third PCIe slot of the PCIe slot assembly enables the switch circuit to automatically assign lanes to the first PCIe slot, second PCIe slot and third PCIe slot of the PCIe slot assembly according to the detection results, increasing the convenience of expansion application and having a higher performance and expansibility.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: April 9, 2019
    Assignee: ADLINK TECHNOLOGY INC.
    Inventors: Hsien-Kuang Chiu, Peng-Yuan Chu, Yi-Kuo Chen, Chien-Chih Chen, Chien-Yi Hsu
  • Publication number: 20070139330
    Abstract: A display unit for a display panel. The display unit comprises a switch unit, a liquid crystal capacitance, and a storage capacitor. The switch unit has a control terminal coupled to a scan line, an input terminal coupled to a data line, and an output terminal coupled to a pixel electrode. The liquid crystal capacitance is coupled between the pixel electrode and a common electrode receiving a common-voltage signal. The storage capacitor is coupled to the pixel electrode and a reference electrode receiving a low-gate signal. The level of the common-voltage signal is different from that of the low-gate signal.
    Type: Application
    Filed: December 19, 2005
    Publication date: June 21, 2007
    Inventors: I-Wei Wu, Chien-Yi Hsu, Yi-Hsing Lee
  • Publication number: 20040133294
    Abstract: To rapidly respond to successive abnormal defect events, a defect alarm system and method comprises counting the defect detection data from a defect scan station using a defect data analysis system and producing a trend chart for the defect detection data. A defect data analysis system analyzes the trend chart at a constant time frame and records the successive abnormal defect events to produce a defect alarm report, and an email system automatically sends out the defect alarm report to notice the responsible engineer timely. After receiving the notice, the engineer compares the received defect distribution map with those of known events in a defect pattern database to judge if the event is a known one to propose a policy.
    Type: Application
    Filed: September 2, 2003
    Publication date: July 8, 2004
    Inventors: Wei-Ming Chen, Gi-Gin Lin, Chien-Yi Hsu