Abstract: A semiconductor chip includes a first intellectual property block. There are a second intellectual property block and a third intellectual property block around the first intellectual property block. There is a multiple metal layer stack over the first intellectual property block, the second intellectual property block, and the third intellectual property block. An interconnect structure is situated in the upper portion of the multiple metal layer stack. The interconnect structure is configured for connecting the first intellectual property block and the second intellectual property block. In addition, at least a part of the interconnect structure extends across and over the third intellectual property block.

Abstract: A light emission apparatus includes a laser diode configured to emit a light; a laser driver electrically coupled to the laser diode, the laser driver being configured to drive the laser diode to generate the light; and an optical module arranged to receive the light emitted by the laser diode, the optical module comprising at least one optical element and being configured to adjust the light and emits a transmitting light; wherein the transmitting light emits from the optical module with an illumination angle and the optical module adjusts the light to vary the illumination angle.

Abstract: An intelligent PCIe slot lane assignment method applied to a motherboard including a CPU capable of providing at least 16 lanes, a switch circuit, a PCIe slot assembly consisting of a first PCIe slot, a second PCIe slot and a third PCIe slot, and a logic controller. The intelligent control of the logic controller in detection of the insertion of a PCIe expansion card in the first PCIe slot, second PCIe slot and third PCIe slot of the PCIe slot assembly enables the switch circuit to automatically assign lanes to the first PCIe slot, second PCIe slot and third PCIe slot of the PCIe slot assembly according to the detection results, increasing the convenience of expansion application and having a higher performance and expansibility.

Abstract: A display unit for a display panel. The display unit comprises a switch unit, a liquid crystal capacitance, and a storage capacitor. The switch unit has a control terminal coupled to a scan line, an input terminal coupled to a data line, and an output terminal coupled to a pixel electrode. The liquid crystal capacitance is coupled between the pixel electrode and a common electrode receiving a common-voltage signal. The storage capacitor is coupled to the pixel electrode and a reference electrode receiving a low-gate signal. The level of the common-voltage signal is different from that of the low-gate signal.

Abstract: To rapidly respond to successive abnormal defect events, a defect alarm system and method comprises counting the defect detection data from a defect scan station using a defect data analysis system and producing a trend chart for the defect detection data. A defect data analysis system analyzes the trend chart at a constant time frame and records the successive abnormal defect events to produce a defect alarm report, and an email system automatically sends out the defect alarm report to notice the responsible engineer timely. After receiving the notice, the engineer compares the received defect distribution map with those of known events in a defect pattern database to judge if the event is a known one to propose a policy.