Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.

Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.

Abstract: A method of forming a semiconductor device includes arranging a semi-finished substrate, which has been tested and is known to be good, on a carrier substrate. Encapsulating the semi-finished substrate in a first encapsulant and arranging at least one semiconductor die over the semi-finished substrate. Electrically coupling at least one semiconductor component of the at least one semiconductor die to the semi-finished substrate and encasing the at least one semiconductor die and portions of the first encapsulant in a second encapsulant. Removing the carrier substrate from the semi-finished substrate and bonding a plurality of external contacts to the semi-finished substrate.

Abstract: A semiconductor structure includes a dielectric layer over a substrate, a via conductor over the substrate and in the dielectric layer, and a first graphene layer disposed over the via conductor. In some embodiments, a top surface of the via conductor and a top surface of the dielectric layer are level. In some embodiments, the first graphene layer overlaps the via conductor from a top view. In some embodiments, the semiconductor structure further includes a second graphene layer under the via conductor and a third graphene layer between the dielectric layer and the via conductor. In some embodiments, the second graphene layer is between the substrate and the via conductor.

Abstract: An antenna module includes a first antenna radiator including a feeding terminal, a second antenna radiator, a first ground radiator, a second ground radiator and a capacitive element. The second antenna radiator is disposed on one side of the first antenna radiator, and a first gap is formed between a main portion of the second antenna radiator and the first antenna radiator. The first ground radiator is disposed on another side of the first antenna radiator, and a second gap is formed between the first antenna radiator and the first antenna radiator. The second ground radiator is disposed between the second antenna radiator and the first ground radiator, and a third gap is formed between the second ground radiator and a first branch of the second antenna radiator. The capacitive element is disposed on the third gap and connects the second antenna radiator and the second ground radiator.

Abstract: Some implementations described herein a provide a multi-die package and methods of formation. The multi-die package includes a dynamic random access memory integrated circuit die over a system-on-chip integrated circuit die, and a heat transfer component between the system-on-chip integrated circuit die and the dynamic random access memory integrated circuit die. The heat transfer component, which may correspond to a dome-shaped structure, may be on a surface of the system-on-chip integrated circuit die and enveloped by an underfill material between the system-on-chip integrated circuit die and the dynamic random access memory integrated circuit die. The heat transfer component, in combination with the underfill material, may be a portion of a thermal circuit having one or more thermal conductivity properties to quickly spread and transfer heat within the multi-die package so that a temperature of the system-on-chip integrated circuit die satisfies a threshold.

Abstract: Integrated circuit packages and methods of forming the same are discussed. In an embodiment, a device includes: a package substrate; a semiconductor device attached to the package substrate; an underfill between the semiconductor device and the package substrate; and a package stiffener attached to the package substrate, the package stiffener includes: a main body extending around the semiconductor device and the underfill in a top-down view, the main body having a first coefficient of thermal expansion; and pillars in the main body, each of the pillars extending from a top surface of the main body to a bottom surface of the main body, each of the pillars physically contacting the main body, the pillars having a second coefficient of thermal expansion, the second coefficient of thermal expansion being less than the first coefficient of thermal expansion.

Abstract: A processing path generating method includes the following steps. An image-capturing device is moved to the first position of the region of interest to perform an image-capture on a workpiece, so as to obtain a first image. The image-capturing device is moved to a second position to perform the image-capture on the workpiece, so as to obtain a second image. A first edge characteristic and a second edge characteristic of the workpiece are obtained according to the first image and the second image. Three-dimensional edge information of the workpiece is fitted according to the first edge characteristic and the second edge characteristic. A processing path is generated according to the three-dimensional edge information.

Abstract: An electronic device capable of discharging static electricity is disclosed. The electronic device includes a housing, an antenna arrangement region, and an electrostatic discharge guide. The antenna arrangement region is disposed inside the housing. The electrostatic discharge guide includes a first conductive region, a second conductive region, a non-conductive region, and a discharging unit. The first conductive region is disposed on an inner surface of the housing, and the antenna arrangement region is disposed in the first conductive region. The second conductive region is disposed on the inner surface of the housing. The discharging unit is located in the first conductive region and has a tip, the tip extends toward the second conductive region to cause a spacing between the tip and the second conductive region to be less than or equal to a width of the non-conductive region.

Abstract: A contour accuracy measuring system and a contour accuracy measuring method are provided. The contour accuracy measuring system captures location coordinate data of shafts of a machine tool. The location coordinate data are calculated to obtain a first true round trajectory on an inclined plane as reference information. The contour accuracy measuring system then adjusts parameters of the locations of the shafts based on the location coordinate data of the shafts of the reference information to generate a second true round trajectory on the inclined plane, so as to get to know whether the locations of the shafts after the parameters are adjusted comply with a standard. Therefore, the overall measurement process can be speeded up by automatically measuring the parameters and automatically testing an operating status.

Abstract: Wafer taping apparatuses and methods are provided for determining whether taping defects are present on a semiconductor wafer, based on image information acquired by an imaging device. In some embodiments, a method includes applying an adhesive tape on a surface of a semiconductor wafer. An imaging device acquires image information associated with the adhesive tape on the semiconductor wafer. The presence or absence of taping defects is determined by defect recognition circuitry based on the acquired image information.

Abstract: Wafer taping apparatuses and methods are provided for determining whether taping defects are present on a semiconductor wafer, based on image information acquired by an imaging device. In some embodiments, a method includes applying an adhesive tape on a surface of a semiconductor wafer. An imaging device acquires image information associated with the adhesive tape on the semiconductor wafer. The presence or absence of taping defects is determined by defect recognition circuitry based on the acquired image information.

Abstract: An electronic device, including a circuit board module, a first shielding plate and multiple first shielding plugs, are provided. The circuit board module includes a first surface, a second surface opposite to the first surface, a first electromagnetic wave source and multiple first clamp bases. The first electromagnetic wave source and the first clamp bases are located on the first surface. The first electromagnetic wave source is surrounded by the first clamp bases. The first shielding plugs are respectively inserted into the first clamp bases. The first shielding plate is disposed at a side of the first surface of the circuit board module and connected to the first shielding plugs. The first shielding plate and the first shielding plugs jointly cover the first electromagnetic wave source.

Abstract: An electronic device, including a circuit board module, a first shielding plate and multiple first shielding plugs, are provided. The circuit board module includes a first surface, a second surface opposite to the first surface, a first electromagnetic wave source and multiple first clamp bases. The first electromagnetic wave source and the first clamp bases are located on the first surface. The first electromagnetic wave source is surrounded by the first clamp bases. The first shielding plugs are respectively inserted into the first clamp bases. The first shielding plate is disposed at a side of the first surface of the circuit board module and connected to the first shielding plugs. The first shielding plate and the first shielding plugs jointly cover the first electromagnetic wave source.

Abstract: An internet phone system includes an internet phone main body, an expansion device and a multiple-layer connecting card. The internet phone main body includes a first connecting port. The at least one expansion device includes a second connecting port. One end of the multiple-layer connecting card is connected to the first connecting port, and the other end is connected to the second connecting port such that the internet phone main body can be electrically connected to the expansion device via the multiple-layer connecting card. The expansion device is capable of combining with another expansion device by another multiple-layer connecting card.

Abstract: A contour accuracy measuring system and a contour accuracy measuring method are provided. The contour accuracy measuring system captures location coordinate data of shafts of a machine tool. The location coordinate data are calculated to obtain a first true round trajectory on an inclined plane as reference information. The contour accuracy measuring system then adjusts parameters of the locations of the shafts based on the location coordinate data of the shafts of the reference information to generate a second true round trajectory on the inclined plane, so as to get to know whether the locations of the shafts after the parameters are adjusted comply with a standard. Therefore, the overall measurement process can be speeded up by automatically measuring the parameters and automatically testing an operating status.

Abstract: Wafer taping apparatuses and methods are provided for determining whether taping defects are present on a semiconductor wafer, based on image information acquired by an imaging device. In some embodiments, a method includes applying an adhesive tape on a surface of a semiconductor wafer. An imaging device acquires image information associated with the adhesive tape on the semiconductor wafer. The presence or absence of taping defects is determined by defect recognition circuitry based on the acquired image information.

Abstract: An electronic device includes a ground element, a conductive assembly, a circuit board, an insulating element and a conductive element. The conductive assembly includes a base and a screw element. The base is disposed at the ground element and contacts the ground element. The screw element has a fixing portion and a clamping portion connected to the fixing portion. The outer diameter of the clamping portion is larger than the outer diameter of the fixing portion, and the fixing portion is fixed to the base. The circuit board is disposed between the base and the clamping portion of the screw element. The insulating element is disposed between part of the clamping portion and the circuit board. The conductive element is disposed at the circuit board and contacts the conductive assembly. The circuit board is electrically connected to the ground element through the conductive element and the conductive assembly.

Abstract: A detection device, detection method, and compensation method for tool wear, applied to a machine tool including a spindle connected to a tool. A first parameter set including a first cutting depth having a zero cutting depth is set, and the machine tool performs a cutting procedure with the first parameter set to record a first loading rate of the spindle. A second parameter set including a second cutting depth having a non-zero cutting depth is set, and the machine tool performs the cutting procedure with the second parameter set to record a second loading rate of the spindle. A processing device calculates an estimated cutting force according to the loading rates and a machine performance database. A fuzzy logic unit outputs a wear level according to a tool wear database and the estimated cutting force. The machine tool adjusts a cutting locus according to the wear level.

Abstract: An internet phone system includes an internet phone main body, an expansion device and a multiple-layer connecting card. The internet phone main body includes a first connecting port. The at least one expansion device includes a second connecting port. One end of the multiple-layer connecting card is connected to the first connecting port, and the other end is connected to the second connecting port such that the internet phone main body can be electrically connected to the expansion device via the multiple-layer connecting card. The expansion device is capable of combining with another expansion device by another multiple-layer connecting card.