Patents by Inventor Chien-Ying Yu

Chien-Ying Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11988952
    Abstract: A lens driving device and a driving method thereof are provided. The lens driving device includes a lens frame, a magnetic group, a driving element group and a control device. The lens frame carries at least one optical element. The magnetic group includes a plurality of pairs of magnetic elements. The driving element group includes at least two coils. The control device supplies power to the driving element group so that the lens frame is driven by the driving element group to move. The driving element group is disposed on the lens frame, and the amount of the lens frame is equal to that of the driving element group. The control device in a first driving state supplies the power to the coils in sequence so that the driving element group is moved from a pair of magnetic elements to another pair of magnetic elements.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: May 21, 2024
    Assignees: SINTAI OPTICAL (SHENZHEN) CO., LTD., ASIA OPTICAL CO., INC.
    Inventors: Hui-Yuan Liang, Chien-Heng Yu, Zi-Ying Ye
  • Patent number: 8466729
    Abstract: A delay cell includes a first inverted transistor pair, a second inverted transistor pair and a plurality of delay units. The first inverted transistor pair is used to receive an input signal. The second inverted transistor pair is electrically cross-coupled to the first inverted transistor pair and cross-controlled by the first inverted transistor pair. The delay units are cascaded between the first inverted transistor pair and between the second inverted transistor pair, thereby providing a plurality of signal propagation delays sequentially, wherein the input signal is delayed for a pre-determined time by the first inverted transistor pair, the second inverted transistor pair and the delay units which are operated sequentially, thereby creating an output signal corresponding to the pre-determined time. A digitally controlled oscillator including the aforementioned delay cells is provided.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: June 18, 2013
    Assignee: National Chiao Tung University
    Inventors: Chen-Yi Lee, Chien-Ying Yu, Chia-Jung Yu
  • Publication number: 20130038369
    Abstract: A delay cell includes a first inverted transistor pair, a second inverted transistor pair and a plurality of delay units. The first inverted transistor pair is used to receive an input signal. The second inverted transistor pair is electrically cross-coupled to the first inverted transistor pair and cross-controlled by the first inverted transistor pair. The delay units are cascaded between the first inverted transistor pair and between the second inverted transistor pair, thereby providing a plurality of signal propagation delays sequentially, wherein the input signal is delayed for a pre-determined time by the first inverted transistor pair, the second inverted transistor pair and the delay units which are operated sequentially, thereby creating an output signal corresponding to the pre-determined time. A digitally controlled oscillator including the aforementioned delay cells is provided.
    Type: Application
    Filed: January 18, 2012
    Publication date: February 14, 2013
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Chen-Yi LEE, Chien-Ying YU, Chia-Jung YU
  • Patent number: 7825713
    Abstract: An absolute time delay generating device includes a PVT (process-voltage-temperature) detection device and a delay-timing generator. The PVT detection device includes at least a delay module and a signal phase/frequency control module. The delay module includes a control unit and a reference unit. The control unit differs from the reference unit in sensitivity of delay property to PVT. The delay module compares phase or frequency differences generated when origin signals pass through the control unit and reference unit respectively, and produce delay parameters of the delay module. The signal phase/frequency control module receives and compares the delay parameters to determine an ambient PVT condition for the absolute time delay generating device, so as to control and correct the delay-timing generator and thereby generate accurate absolute time delay. Under various PVT influences, the absolute time delay generating device is capable of generating accurate, absolute time signals.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: November 2, 2010
    Assignee: National Chiao Tung University
    Inventors: Chen-Yi Lee, Jui-Yuan Yu, Chien-Ying Yu, Juinn-Ting Chen
  • Publication number: 20100013536
    Abstract: An absolute time delay generating device includes a PVT (process-voltage-temperature) detection device and a delay-timing generator. The PVT detection device includes at least a delay module and a signal phase/frequency control module. The delay module includes a control unit and a reference unit. The control unit differs from the reference unit in sensitivity of delay property to PVT. The delay module compares phase or frequency differences generated when origin signals pass through the control unit and reference unit respectively, and produce delay parameters of the delay module. The signal phase/frequency control module receives and compares the delay parameters to determine an ambient PVT condition for the absolute time delay generating device, so as to control and correct the delay-timing generator and thereby generate accurate absolute time delay. Under various PVT influences, the absolute time delay generating device is capable of generating accurate, absolute time signals.
    Type: Application
    Filed: October 2, 2008
    Publication date: January 21, 2010
    Applicant: National Chiao Tung University
    Inventors: Chen-Yi Lee, Jui-Yuan Yu, Chien-Ying Yu, Juinn-Ting Chen