Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.

Abstract: A switching converter circuit for switching one end of an inductor therein between plural voltages according to a pulse width modulation (PWM) signal to convert an input voltage to an output voltage. The switching converter circuit has a driver circuit including a high side driver, a low side driver, a high side sensor circuit, and a low side sensor circuit. The high side sensor circuit is configured to sense a gate-source voltage of a high side metal oxide semiconductor field effect transistor (MOSFET), to generate a low side enable signal for enabling the low side driver to switch a low side MOSFET according to the PWM signal. The low side sensor circuit is configured to sense a gate-source voltage of a low side MOSFET, to generate a high side enable signal for enabling the high side driver to switch a high side MOSFET according to the PWM signal.

Abstract: An electronic device includes a metal back cover, a metal frame, a first antenna module and a second antenna module. The metal frame includes a first and a second disconnection portion, a first and a second connection portion. The first and the second connection portion are connected to the metal back cover. The first disconnection portion is separated from the first connection portion, the metal back cover and the second disconnection portion to form a first slot. The second disconnection portion is connected to the second connection portion and is separated from the metal back cover to form a second slot. The first antenna module is connected to the first disconnection portion, and forms a first antenna path. The second antenna module is connected to the second disconnection portion, and forms a second and a third antenna path with the second disconnection portion and the metal back cover.

Abstract: A new method of forming a self-aligned contact is achieved. A pattern of polysilicon gate electrode stack including a silicon oxide gate dielectric, a polysilicon gate electrode, a first thermal polyoxide layer over the top of said polysilicon gate electrode layer, a first silicon nitride layer over said first thermal polyoxide layer, and a TEOS layer over said silicon nitride layer is provided on a silicon substrate. Each of the layers has its side open to the ambient. Inert ions are implanted into the substrate which is not covered by the polysilicon gate electrode stack in such a manner as to reduce the possibility of the oxidation of the surface of the substrate. The pattern of polysilicon gate electrode stack and the surface of the said substrate are subjected to a thermal oxidizing ambient which causes oxidation of the sides open to the ambient of the polysilicon layer to form a second polyoxide layer on the sides of the polysilicon layer.

Abstract: A method of forming a self-aligned contact is disclosed. A pattern of polysilicon gate electrode stack including a silicon oxide gate dielectric, a polysilicon gate electrode, a first thermal polyoxide layer over the top of said polysilicon gate electrode layer, a first silicon nitride layer over said first thermal polyoxide layer, and a TEOS layer over said silicon nitride layer is provided on a silicon substrate. Each of the layers has its sides open to the ambient. Inert ions are implanted into the substrate which is not covered by the polysilicon gate electrode stack in such a manner as to reduce the possibility of the oxidation of the surface of the substrate. The pattern of polysilicon gate electrode stack and the surface of the said substrate are subjected to a thermal oxidizing ambient which causes oxidation of the sides open to the ambient of the polysilicon layer to form a second polyoxide layer on the sides of the polysilicon layer.