Abstract: A liquid crystal display (LCD) panel has a structure in which one of the thin film transistor (TFT) substrate and the color filter (CF) substrate has an indented pattern surface to contact or surround the end of the spacer, such that the friction between the spacers and indented pattern surface can be reduced, thus shifting of spacer to a wrong position can be avoided. A method of manufacturing such LCD panel is also disclosed.

Abstract: A liquid crystal display (LCD) panel has a structure in which one of the thin film transistor (TFT) substrate and the color filter (CF) substrate has an indented pattern surface to contact or surround the end of the spacer, such that the friction between the spacers and indented pattern surface can be reduced, thus shifting of spacer to a wrong position can be avoided. A method of manufacturing such LCD panel is also disclosed.

Abstract: The invention is directed to a card edge connector. The card edge connector is electrically connected to a first circuit board for insertion of a second circuit board therein such that the second circuit board can electrically connect with the first circuit board. The second circuit board is secured within the card edge connector by means of an interference device disposed on one side of a support arm of the card edge connector. The top side of the interference device is at a height higher than the surface of the second circuit board. When the user desires to remove the second circuit board from the card edge connector, a force can be applied to the interference device to cause the two support arms to expand slightly outward, thereby permitting removal of the second circuit board and also eliminating the risk of easy breaking of free ends of the support arms associated with conventional card edge connectors.

Abstract: An electrical connector system is provided for a mobile phone which includes a lower housing disposed beneath a printed circuit board having a plurality of circuit traces on a bottom side thereof. The housing includes at least one cavity in an upper side thereof opposite the bottom side of the printed circuit board. A connector module is positionable in the cavity and includes a frame having at least one connector thereon. The connector has at least one flexible contact for surface-engaging a respective circuit trace on the bottom side of the printed circuit board. A complementary interengaging mounting structure is provided between the frame of the connector module and the lower phone housing to releasably mount the module in the cavity. Thereby the module easily can be selectively removed from the housing for repair or replacement purposes.

Abstract: An electrical connector system is provided for a mobile phone which includes a lower housing disposed beneath a printed circuit board having a plurality of circuit traces on a bottom side thereof. The housing includes at least one cavity in an upper side thereof opposite the bottom side of the printed circuit board. A connector module is positionable in the cavity and includes a frame having at least one connector thereon. The connector has at least one flexible contact for surface-engaging a respective circuit trace on the bottom side of the printed circuit board. A complementary interengaging mounting structure is provided between the frame of the connector module and the lower phone housing to releasably mount the module in the cavity. Thereby the module easily can be selectively removed from the housing for repair or replacement purposes.

Abstract: The invention is directed to a card edge connector. The card edge connector is electrically connected to a first circuit board for insertion of a second circuit board therein such that the second circuit board can electrically connect with the first circuit board. The second circuit board is secured within the card edge connector by means of an interference device disposed on one side of a support arm of the card edge connector. The top side of the interference device is at a height higher than the surface of the second circuit board. When the user desires to remove the second circuit board from the card edge connector, a force can be applied to the interference device to cause the two support arms to expand slightly outward, thereby permitting removal of the second circuit board and also eliminating the risk of easy breaking of free ends of the support arms associated with conventional card edge connectors.

Abstract: In the present invention, setting apparatus for semiconductor equipment with multitude of chambers comprises a plurality of input devices coupled to a controlling system of the semiconductor equipment. The input devices are used for setting a maintain status of said chambers whereby said chambers can be available for a test process. A method for setting a plurality of statuses for a plurality of chambers in semiconductor equipment comprises setting a plurality of maintain statuses for the chambers and executing a plurality of test process in the chambers in the maintain statuses. To be specific, the setting step can simultaneously set an on-line status for each the chamber and the maintain status for other the chamber.

Abstract: In the present invention, setting apparatus for semiconductor equipment with multitude of chambers comprises a plurality of input devices coupled to a controlling system of the semiconductor equipment. The input devices are used for setting a maintain status of said chambers whereby said chambers can be available for a test process. A method for setting a plurality of statuses for a plurality of chambers in semiconductor equipment comprises setting a plurality of maintain statuses for the chambers and executing a plurality of test process in the chambers in the maintain statuses. To be specific, the setting step can simultaneously set an on-line status for each the chamber and the maintain status for other the chamber.

Abstract: A new method of fabricating a capacitor and PMOS devices in a mixed-mode product production in which a composite polysilicon top plate electrode is provided which prevents out-diffusion of dopant from the capacitor plate so that there is no auto-doping of the PMOS channel region is described. A layer of gate silicon oxide is provided over the surface of a semiconductor substrate. A first polysilicon layer is deposited overlying the gate silicon oxide layer. The first polysilicon layer and gate oxide layer are etched away where they are not covered by a mask to provide a PMOS gate electrode in a first region of the wafer and a bottom plate electrode for the capacitor in a second region of the wafer. A capacitor dielectric layer is deposited over the surface of the wafer. A composite polysilicon layer is deposited overlying the capacitor dielectric layer wherein the composite polysilcon layer comprises a lower doped polysilcon layer and an upper undoped polysilicon layer.

Abstract: An exhaust gas treatment apparatus for treating exhaust gas generated in semiconductor manufacturing processes. It includes a main pipe, a gas vortex means, a water vortex means, an U pipe and a discharge pipe. The main pipe transforms the exhaust gases to waste powder which are discharged out through the U pipe and the discharge pipe. The gas vortex means and water vortex means are located below the main pipe for generating annular and even downward gas flow and water flow at the outlet of the main pipe for preventing reflux of waste powder from entering into the main pipe. Waste powder thus won't deposit around the outlet. Scraper in the main pipe won't be stuck or deformed. Waste powder may be discharged out through the U pipe and discharge pipe smoothly and efficiently.

Abstract: A new method of fabricating a capacitor and PMOS devices in a mixed-mode product production in which a composite polysilicon top plate electrode is provided which prevents out-diffusion of dopant from the capacitor plate so that there is no auto-doping of the PMOS channel region is described. A layer of gate silicon oxide is provided over the surface of a semiconductor substrate. A first polysilicon layer is deposited overlying the gate silicon oxide layer. The first polysilicon layer and gate oxide layer are etched away where they are not covered by a mask to provide a PMOS gate electrode in a first region of the wafer and a bottom plate electrode for the capacitor in a second region of the wafer. A capacitor dielectric layer is deposited over the surface of the wafer. A composite polysilicon layer is deposited overlying the capacitor dielectric layer wherein the composite polysilcon layer comprises a lower doped polysilcon layer and an upper undoped polysilicon layer.

Abstract: A method is described for the prevention of the corrosion of interconnection wirings made of aluminum or aluminum-copper alloys in semiconductor integrated circuits. The invention uses a weak solution of NH.sub.4 OH to remove chlorine-containing residues that adhere to the sidewalls of the metal wirings patterned by reactive ion etching using chlorine-containing gaseous components, thus effectively quenching the chain reaction of aluminum electrochemical corrosion involving these chlorine-containing residues as an intermediary.

Abstract: A non-vacuum semiconductor pick-up and transfer apparatus for handling semiconductor wafers. A flat tapered blade, with front and rear arcuate abutment surfaces adapted to hold a wafer, is provided. In use the blade is thrust between spaced wafers supported in a holder, lifted to retain the wafer between the abutment surfaces, and removed from the holder. The thin and tapered blade shape minimizes damage to the associated wafers in the event of a misalignment of the blade with the wafers.