Abstract: An LED driver and an operating method thereof are provided. The LED driver includes a conversion circuit, a switch circuit and a control circuit. The positive and negative output terminals of the conversion circuit are electrically coupled to the LED light source through two switches of the switch circuit respectively. After the control circuit receives a light-off command, the control circuit generates the dimming signal to configure the conversion circuit to decrease the output current; and when the control circuit determines that the output current is less than a turn-off current threshold, the control circuit configures the two switches of the switch circuit to be in a non-conduction state.

Abstract: A semiconductor device includes a substrate, a first transistor, a second transistor and a third transistor. The substrate includes a high-voltage (HV) area, a medium-voltage (MV) area, and a low-voltage (LV) area. The first transistor is disposed in the HV area and includes a first gate dielectric layer and a first gate electrode. The second transistor is disposed in the LV area and includes a plurality of fin-shaped structures and a second gate electrode. The third transistor is disposed in the MV area and includes a third gate dielectric layer and a third gate electrode. The topmost surfaces of the first gate electrode, the second gate electrode and the third gate electrode are coplanar with each other.

Abstract: An LED driver and an operating method thereof are provided. The LED driver includes conversion circuits and a control circuit. The conversion circuits are configured to be electrically coupled to LED light sources for supplying power. The control circuit is configured to: configure the conversion circuits to generate output currents and output voltages; calculate output powers of the conversion circuits; sum up the output powers of the conversion circuits to obtain a total output power; and when it is determined that the total output power is greater than a power limit, configure at least one of the conversion circuits to reduce at least one of the output currents according to the power limit and according to at least one of the total output power and the output powers of the conversion circuits, so as to reduce the total output power to be less than or equal to the power limit.

Abstract: Provided is a quick-assembly adapter, wherein a screw fastener is accommodated within a central accommodating portion of a base, a rotating ring is sleeved around fixing portions of the base, each of gear accommodating portions of the base accommodates two horizontally adjacent second gears, second teeth of the two adjacent second gears are meshed with each other, the second teeth close to the central accommodating portion are meshed with first teeth of a first gear of the screw fastener, the second teeth close to the rotating ring are meshed with inner teeth of the rotating ring, and fasteners fix a carrying member with the base. When rotating the rotating ring, the inner teeth drive the second teeth, making the two adjacent second gears rotate in opposite directions, and the second teeth drive the first teeth, such that the screw fastener rotates in a direction same as the rotating ring.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric ((IMD) layer on the substrate and a first metal interconnection in the first IMD layer, forming a bonding pad on the first IMD layer, forming a passivation layer on the bonding pad, removing part of the passivation layer to expose the bonding pad, performing a chip probing test on the bonding pad, removing the bonding pad to form a recess, forming a dielectric layer to fill the recess completely, and forming a second metal interconnection in the dielectric layer.

Abstract: A method for fabricating semiconductor device includes the steps of first providing a first substrate having a high-voltage (HV) region and a medium voltage (MV) region and a second substrate having a low-voltage (LV) region and a static random access memory (SRAM) region, in which the HV region includes a HV device, the MV region includes a MV device, the LV region includes a fin field-effect transistor (FinFET), and the SRAM region includes a SRAM device. Next, a bonding process is conducted by using hybrid bonding, through-silicon interposer (TSI) or redistribution layer (RDL) for bonding the first substrate and the second substrate.

Abstract: A method for fabricating a micro display device includes the steps of providing a wafer comprising a first area, a second area, and a third area, forming first bonding pads on the first area, forming second bonding pads on the second area, and forming third bonding pads on the third area. Preferably, the first bonding pads and the second bonding pads are made of different materials and the first bonding pads and the third bonding pads are made of different materials.

Abstract: A method for fabricating semiconductor device includes the steps of first providing a first wafer and a second wafer, performing a first dicing process to separate the first wafer into first dies, bonding the first dies onto the second wafer, forming a first molding layer around the first dies, forming first bumps on the first dies, performing a second dicing process to separate the second wafer for forming second dies, and then bonding the first dies onto a third wafer.

Abstract: An LED driver, an LED lighting system and an operating method thereof are provided. The LED driver is for driving an LED light source and includes a strobe circuit and a DC-DC converter. The strobe circuit generates a low-frequency modulation signal. The DC-DC converter is coupled to the strobe circuit and is configured to provide an adjustable operating current to the LED light source according to a DC signal and the low-frequency modulation signal. The operating current includes a DC current signal and a low-frequency AC current signal corresponding to the DC signal and the low-frequency modulation signal respectively. A frequency of the low-frequency AC current signal is between 25 Hz and 100 Hz, and a current ripple factor, equaling a difference of a maximum value and a minimum value of the operating current divided by a sum of the maximum value and the minimum value, is less than 8%.

Abstract: A method for fabricating a semiconductor device includes the steps of first providing a wafer, forming a scribe line on a front side of the wafer, performing a plasma dicing process to dice the wafer along the scribe line without separating the wafer completely, performing a laminating process to form a tape on the front side of the wafer, performing a grinding process on a backside of the wafer, and then performing an expanding process to divide the wafer into chips.

Abstract: A method for fabricating semiconductor device includes the steps of first providing a first substrate having a high-voltage (HV) region and a medium voltage (MV) region and a second substrate having a low-voltage (LV) region and a static random access memory (SRAM) region, in which the HV region includes a HV device, the MV region includes a MV device, the LV region includes a fin field-effect transistor (FinFET), and the SRAM region includes a SRAM device. Next, a bonding process is conducted by using hybrid bonding, through-silicon interposer (TSI) or redistribution layer (RDL) for bonding the first substrate and the second substrate.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spin orbit torque (SOT) layer on the MTJ, a spacer adjacent to the MTJ and the first SOT layer, and a second SOT layer on the first SOT layer. Preferably, the first SOT layer and the second SOT layer are made of same material.

Abstract: Provided herein are methods for treating or ameliorating malignant diseases, such as cancers. Also provided herein are methods of increasing the immunity of an immune cell toward malignant cells.

Abstract: The invention provides a semiconductor structure, which comprises an inter-metal dielectric layer disposed on the substrate, a metal interconnection disposed in the inter-metal dielectric layer, wherein at least a portion of a top surface of the inter-metal dielectric layer is lower than a top surface of the metal interconnection, a MTJ (magnetic tunneling junction) stacked structure disposed on the metal interconnection, and a SOT (spin orbit torque) layer arranged on the MTJ stacked structure, wherein the SOT layer comprises a first part with a thick thickness and two second parts with a thin thickness.

Abstract: A method for fabricating semiconductor device includes the steps of first bonding a first wafer to a second wafer to form a first stack structure, forming first bumps on one side of the first stack structure, bonding a third wafer to a fourth wafer to form a second stack structure, forming second bumps on one side of the second stack structure, and then bonding the first stack structure to the second stack structure by bonding the first bumps and the second bumps.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spin orbit torque (SOT) layer on the MTJ, a second SOT layer on the first SOT layer, a hard mask between the first SOT layer and the second SOT layer, and a spacer adjacent to the MTJ, the first SOT layer, and the hard mask.

Abstract: A flash memory controller includes a specific buffer and a processor. The specific buffer allocates a cache space. The processor receives a specific host address sent from the host device, reads and loads a corresponding address pointer mapping table from the flash memory into the cache space according to address information pointed by a specific address pointer linker, determines a specific address pointer corresponding to the specific host address from the corresponding address pointer mapping table according to the specific host address, reads and loads a corresponding address mapping table from the flash memory into the cache space according to address information pointed by a specific address pointer corresponding to the specific host address, and finds a specific flash memory address from the corresponding address mapping table according to the specific host address to perform an access operation in response to the found specific flash memory address.

Abstract: The invention provides a semiconductor structure, which comprises an MTJ (magnetic tunneling junction) stacked structure arranged on a substrate, and a SOT (spin orbit torque) layer arranged on the MTJ stacked structure, wherein the SOT layer comprises a first part with a thick thickness and two second parts with a thin thickness.