Abstract: There is provided a technique that includes: an upper container; a lower container provided below the upper container and constituting a processing chamber between the lower container and the upper container; a first seal portion disposed in a boundary region between the upper container and the lower container, the first seal portion including a first seal member and a second seal member; and a support that includes a support face disposed at a highest position below the upper container, is provided between the first seal member and the second seal member in a horizontal direction, and is made of a material harder than the first seal member and the second seal member.

Abstract: According to the present disclosure, there is provided a technique capable of suppressing a replacement of a quartz vessel due to an occurrence of a crack of the quartz vessel. There is provided a technique including: a quartz vessel provided with a process chamber; a gas supplier; a coil surrounding the quartz vessel and configured to excite a process gas by a plasma generated by supplying a high frequency power to the coil, wherein a distance between the coil and an outer peripheral surface of a first portion of the quartz vessel is set to be greater than a distance between the coil and an outer peripheral surface of a second portion of the quartz vessel, and wherein a silicon hydroxide film is formed on an inner peripheral surface of the first portion and the silicon hydroxide film is not formed on an inner peripheral surface of the second portion.

Abstract: A method and apparatus for high assurance boot processing is disclosed. A trusted processor is used to authenticate a trusted boot program and in conjunction with a selector, to provide the authenticated boot program to a boot memory where it can be accessed by a main processor to execute the bootup sequence. The trusted processor also provides a command for the main processor to write a data sequence to a hard drive or similar device, and monitors the data written by the main processor to verify that the data has not been tampered with or otherwise compromised.

Abstract: A method and apparatus for preventing compromise of data stored in a memory by assuring the deletion of data and minimizing data remanence affects is disclosed. The method comprises the steps of monitoring the memory to detect tampering, and if tampering is detected, generating second signals having second data differing from the first data autonomously from the first processor; providing the generated second signals to the input of the memory; and storing the second data in the memory. Several embodiments are disclosed, including self-powered embodiments and those which use separate, dedicated processors to generate, apply, and verify the zeroization data.