Abstract: An image sensor module comprises an image sensor having a light sensing area, a cover glass for covering the light sensing area, a dam between the image sensor and the cover glass, which surrounds the light sensing area, and has an outer wall and an inner wall, where a cross-section of the inner wall parallel to the surface of the light sensing area of the image sensor forms a sawtooth pattern and/or, where a cross-section of the inner wall orthogonal to the surface of the light sensing area of the image sensor forms an inclined surface.

Abstract: A method for matching parameters applied to a display device and a circuit system that performs the method are provided. In the method, when a display device is activated, a circuit system connects to a panel module of the display device for retrieving parameters from a panel memory. The parameters are such as video display parameters, camera image parameters, speaker audio parameters, and microphone receiving parameters. After the parameters are applied to the circuit system, the circuit system operates the display device using the parameters. The data generated by the circuit system can be adjusted for matching new parameters. Afterwards, when the new parameters are applied to the circuit system, video and audio are outputted according to the matched parameters, and the camera and microphone in the panel module are also operated according to the matched parameters.

Abstract: An automatic material changing and welding system for stamping materials includes a welding transfer sliding table and a welding platform. The automatic material changing device further includes a feeding system. The feeding system includes a double-head uncoiling machine, an automatic feeding machine and a flattening machine. The automatic material changing device is used for automatic feeding for a stamping machine. The system triggers a material changing signal through a sensor to control and integrate the welding transfer sliding table and the welding platform to act to execute a welding procedure, so that the stamping materials are in welding connection with new and old coiled materials through a welding connection plate to realize continuous production operation of an automated stamping production line.

Abstract: The present invention relates to a method for producing recombinant human prethrombin-2 protein and having human ?-thrombin activity by the plant-based expression systems.

Abstract: A temperature sensing device includes a substrate, a first reflective module, a first window cover, and a dual thermopile sensor. The first reflective module is disposed on the substrate, including a first mirror chamber with a narrow field of view (FOV), and the first reflective module focuses a thermal radiation from measured object to a first image plane in the first mirror chamber. The first window cover is disposed on the first reflective module, and the first window cover allows a selected band of the thermal radiation to pass through. The dual thermopile sensor is disposed on the substrate and located in the first mirror chamber, and the dual thermopile sensor senses a temperature data from the first image plane. Additional second reflective module, LED source plus pin hole with same FOV of dual thermopile sensor can illuminate the measured object for ease of placement of object to be heated.

Abstract: A multi-phase coupled inductor includes a first iron core, a second iron core, and a plurality of coil windings. The first iron core includes a first body and a plurality of first core posts. The plurality of first core posts are connected to the first body. The second iron core is opposite to the first iron core. The second iron core and the first body are spaced apart from each other by a gap. The plurality of coil windings wrap around the plurality of first core posts, respectively. Each of the coil windings has at least two coils.

Abstract: An RF testing method is applied between a testing instrument and multiple devices under test at least including a first DUT and a second DUT. The testing instrument includes a signal generator and a signal analyzer. A sync signal is sent to the testing instrument and the first DUT, so that the first DUT occupies the signal generator to receive a testing signal from the signal generator. The first DUT sends an uplink signal to the signal analyzer based on the testing signal to occupy the signal analyzer for signal analysis at a first point in time. The sync signal is sent to the testing instrument and the second DUT, so that the second DUT occupies the signal generator to receive the testing signal from the signal generator at a second point in time. The first point in time is parallel to the second point in time.

Abstract: An in-phase noise suppression device includes a signal transmitting unit and a grounding unit. The signal transmitting unit includes a number (N) of signal transmitting circuits, where N?3. Each of the signal transmitting circuits has an input terminal and an output terminal, receives a level signal at the input terminal thereof, and outputs the level signal at the output terminal thereof. The grounding unit includes a grounding circuit that is connected to the signal transmitting unit. The level signals respectively received by the signal transmitting circuits at the input terminals thereof, when being respectively transmitted along the signal transmitting circuits, generate at least two balanced digital signals and in-phase noise. The signal transmitting unit and the grounding circuit cooperatively constitute a noise suppression device so as to suppress the in-phase noise generated in the signal transmitting circuits.

Abstract: The present application discloses a semiconductor structure. The semiconductor structure a top die and a bottom die, and the maximum die size is constrained to reticle dimension. Each die includes (1) core: computation circuits, (2) phy: analog circuit connecting to memory, (3) I/O: analog circuit connecting output elements, (4) SERDES: serial high speed analog circuit, (5) intra-stack connection circuit, and (6) cache memory. This semiconductor structure can be chapleted design for high wafer yield with least tape out masks for cost saving. The intra-stack connection circuit connects the top die and the bottom die in the shortest distance (about tens of micrometers), so as to provide high signal quality and power efficiency.

Abstract: The present disclosure discloses a method for recycling all types of lithium batteries. First, the lithium battery waste is acid-leached to obtain a solution containing most of metal ions. After filtering, the solution is separated from the remaining solids, and then the obtained solution is subjected to separate precipitation many times. After separately adjusting the pH value of the solution many times, adding precipitants with a high selectivity ratio, and matching with filtration and separation reaction, all ions in the lithium battery waste are sequentially precipitated in forms of iron phosphate (FePO4), aluminum hydroxide (Al(OH)3), manganese oxide (MnO2), dicobalt trioxide (cobalt oxide, Co2O3), nickel hydroxide (Ni(OH)2), and lithium carbonate (Li2CO3).

Abstract: A method for manufacturing a memory device is provided. The method includes etching an opening in a first dielectric layer; forming a bottom electrode, a resistance switching element, and a top electrode in the opening in the first dielectric layer; forming a second dielectric layer over the bottom electrode, the resistance switching element, and the top electrode; and forming an electrode via connected to a top surface of the top electrode in the second dielectric layer.

Abstract: Methods, systems, and apparatuses can comprise a first device in a wireless communication system receiving configuration of one or more first sidelink resource pools for at least sidelink data transmission and configuration of one or more second sidelink resource pools for sidelink reference signal transmission, receiving a Downlink Control Information (DCI) for sidelink, wherein the DCI comprises a resource pool index corresponding to one sidelink resource pool, determining the DCI for scheduling sidelink data transmission or sidelink reference signal transmission based on at least the resource pool index or the one sidelink resource pool, acquiring or determining fields or information in the DCI based on the determination that the DCI is for scheduling sidelink data transmission or sidelink reference signal transmission, determining a sidelink resource based on the acquired or determined fields, or the information in the DCI, and performing a sidelink transmission on the sidelink resource in the one sidelin

Abstract: The present application discloses a semiconductor structure and methods for manufacturing semiconductor structures. The semiconductor structure includes a plurality of bottom dies and a top die stacked on the bottom dies. The bottom dies receive power supplies through tiny through silicon vias (TSVs) formed in backside substrates of the bottom dies, while the top die receives power supplies through dielectric vias (TDVs) formed in a dielectric layer that covers the bottom dies. By enabling backside power delivery to the bottom die, more space can be provided for trace routing between stacked dies. Therefore, greater computation capability can be achieved within a smaller chip area with less power loss.

Abstract: Provided is a pharmaceutical composition including an active pharmaceutical ingredient, a toll-like receptor (TLR) agonist, a stimulator of interferon genes (STING) agonist, and a pharmaceutically acceptable carrier. Also provided are a method for inducing immune response and a method for treating or preventing cancer or an infectious disease, including administering an effective amount of the pharmaceutical composition to a subject in need thereof.

Abstract: An electrical connector assembly includes an electrical connector and a rotatable sleeve. The electrical connector includes a casing and a coupling component. The coupling component is rotatably disposed on the casing, and the coupling component has at least one first ratchet tooth. The rotatable sleeve is rotatably disposed on the casing. The rotatable sleeve has at least one second ratchet tooth, the second ratchet tooth of the rotatable sleeve is meshed with the first ratchet tooth of the coupling component merely along a first direction for rotating the coupling component relative to the casing.

Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.

Abstract: A compact optical imaging device with short optical length and low sensitivity, for use in an imaging module and an electronic device, comprises first to fifth lenses and a filter. An image-side surface of the fourth lens is convex near an optical axis of the optical imaging device. An image-side surface of the fifth lens is concave near the optical axis. The optical imaging device satisfies formulas 0.03 mm/°<TL5/FOV<0.1 mm/° and 2.4 mm<TL4/FNO<2.9 mm, TL5 being a distance from an object-side surface of the fifth lens to an image plane of the optical imaging device along the optical axis, FOV being a maximum field of view, TL4 being a distance from an object-side surface of the fourth lens to the image plane along the optical axis, and FNO being a F-number of the optical imaging device.

Abstract: An electronic device including a body and a receptacle connector is provided. The body has a side wall surface, a receptacle slot located at the side wall surface, a waterproof protrusion protruding from the side wall surface, and two gutters located at the side wall surface, where the waterproof protrusion is located above the receptacle slot, and the two gutters are respectively located at two opposite sides of the receptacle slot. The receptacle connector is disposed in the receptacle slot.

Abstract: An integrated circuit package including integrated circuit dies with slanted sidewalls and a method of forming are provided. The integrated circuit package may include a first integrated circuit die, a first gap-fill dielectric layer around the first integrated circuit die, a second integrated circuit die underneath the first integrated circuit die, and a second gap-fill dielectric layer around the second integrated circuit die. The first integrated circuit die may include a first substrate, wherein a first angle is between a first sidewall of the first substrate and a bottom surface of the first substrate, and a first interconnect structure on the bottom surface of the first substrate, wherein a second angle is between a first sidewall of the first interconnect structure and the bottom surface of the first substrate. The first angle may be larger than the second angle.