Patents by Inventor Chih-An Liao

Chih-An Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154065
    Abstract: An optoelectronic device includes a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; a first insulating layer on the second semiconductor layer and including a plurality of first openings exposing the first semiconductor layer, wherein the first openings include a first group and a second group; a third electrode on the first insulating layer and including a first extended portion and a second extended portion, wherein the first extended portion and the second extended portion are respectively electrically connected to the first semiconductor layer through the first group of the first openings and the second group of the first openings, and wherein the number of the first group of the first openings is different from the number of the second group of the first openings; and a plurality of fourth electrodes on the second insulating layer and electrically connected to the second semiconductor layer, wherein in a
    Type: Application
    Filed: January 11, 2024
    Publication date: May 9, 2024
    Inventors: Chao-Hsing CHEN, Jia-Kuen WANG, Chien-Chih LIAO, Tzu-Yao TSENG, Tsun-Kai KO, Chien-Fu SHEN
  • Publication number: 20240145431
    Abstract: A method includes: attaching a first die and a second die to a substrate, the first die comprising a conductive via; forming a die spacer between the first die and the second die; thinning the first die and the second die, wherein after thinning the first die and the second die, the die spacer protrudes a first height above an upper surface of the first die; depositing an insulating layer over the first die and the second die; planarizing the insulating layer, wherein after planarizing, the insulating layer has a first thickness above the first die and a second thickness above the die spacer; attaching a third die and a fourth die to the first die and the second die; and attaching a support substrate to the third die and the fourth die.
    Type: Application
    Filed: January 6, 2023
    Publication date: May 2, 2024
    Inventors: Yung-Lung Chen, Ming-Yun Liao, Yi-Hsiu Chen, Wen-Chih Chiou
  • Patent number: 11973164
    Abstract: A light-emitting device includes a substrate including a top surface; a semiconductor stack including a first semiconductor layer, an active layer and a second semiconductor layer formed on the substrate, wherein a portion of the top surface is exposed; a distributed Bragg reflector (DBR) formed on the semiconductor stack and contacting the portion of the top surface of the substrate; a metal layer formed on the distributed Bragg reflector (DBR), contacting the portion of the top surface of the substrate and being insulated with the semiconductor stack; and an insulation layer formed on the metal layer and contacting the portion of the top surface of the substrate.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: April 30, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Che-Hung Lin, Chien-Chih Liao, Chi-Shiang Hsu, De-Shan Kuo, Chao-Hsing Chen
  • Publication number: 20240132904
    Abstract: The present invention relates to a method for producing recombinant human prethrombin-2 protein and having human ?-thrombin activity by the plant-based expression systems.
    Type: Application
    Filed: October 16, 2023
    Publication date: April 25, 2024
    Applicant: PROVIEW-MBD BIOTECH CO., LTD.
    Inventors: Yu-Chia CHANG, Jer-Cheng KUO, Ruey-Chih SU, Li-Kun HUANG, Ya-Yun LIAO, Ching-I LEE, Shao-Kang HUNG
  • Publication number: 20240136444
    Abstract: A flash memory device and method of making the same are disclosed. The flash memory device is located on a substrate and includes a floating gate electrode, a tunnel dielectric layer located between the substrate and the floating gate electrode, a smaller length control gate electrode and a control gate dielectric layer located between the floating gate electrode and the smaller length control gate electrode. The length of a major axis of the smaller length control gate electrode is less than a length of a major axis of the floating gate electrode.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 25, 2024
    Inventors: Yu-Chu Lin, Chi-Chung Jen, Wen-Chih Chiang, Yi-Ling Liu, Huai-Jen Tung, Keng-Ying Liao
  • Publication number: 20240131817
    Abstract: A homogeneous composite substrate includes a woven cloth and at least one fiber membrane. The woven cloth includes a plurality of first fibers. The fiber membrane is disposed on at least one surface of the woven cloth, and the fiber membrane includes a plurality of second fibers, in which a material of the first fibers and a material of the second fibers are the same, a fiber diameter of each first fiber is larger than or equal to 20 ?m and smaller than or equal to 130 ?m, and a fiber diameter of each second fiber is larger than or equal to 3 ?m and smaller than or equal to 10 ?m.
    Type: Application
    Filed: October 18, 2023
    Publication date: April 25, 2024
    Inventors: Shang-Chih CHOU, Yuan-Pei LIAO, Yung-Tan LIN
  • Patent number: 11961777
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a first die, a second die, a first encapsulant, and a buffer layer. The first die and the second die are disposed side by side. The first encapsulant encapsulates the first die and the second die. The second die includes a die stack encapsulated by a second encapsulant encapsulating a die stack. The buffer layer is disposed between the first encapsulant and the second encapsulant and covers at least a sidewall of the second die and disposed between the first encapsulant and the second encapsulant. The buffer layer has a Young's modulus less than a Young's modulus of the first encapsulant and a Young's modulus of the second encapsulant.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Chen, Chien-Hsun Lee, Chung-Shi Liu, Hao-Cheng Hou, Hung-Jui Kuo, Jung-Wei Cheng, Tsung-Ding Wang, Yu-Hsiang Hu, Sih-Hao Liao
  • Patent number: 11956308
    Abstract: A distributed computing system uses dynamically calculates a subset size for each of a plurality of load balancers. Each of a plurality of load balancers logs requests from client devices for connections to back-end servers and periodically sends a request report to a traffic aggregator, which aggregates the report requests from the load balancers in the corresponding zone. Each traffic aggregator sends the aggregated request data to a traffic controller, which aggregates the request data to determine a total number of requests received at the system. The total request data is transmitted through each traffic aggregator to each load balancer instance, which calculates a percentage of the total number of requests produced by the load balancer and determines a subset size based on the calculated percentage.
    Type: Grant
    Filed: May 17, 2023
    Date of Patent: April 9, 2024
    Assignee: Uber Technologies, Inc.
    Inventors: Prashant Varanasi, Chien-Chih Liao, Simon Jeffrey Newton
  • Patent number: 11948863
    Abstract: A package structure and method of forming the same are provided. The package structure includes a polymer layer, a redistribution layer, a die, and an adhesion promoter layer. The redistribution layer is disposed over the polymer layer. The die is sandwiched between the polymer layer and the redistribution layer. The adhesion promoter layer, an oxide layer, a through via, and an encapsulant are sandwiched between the polymer layer and the redistribution layer. The encapsulant is laterally encapsulates the die. The through via extends through the encapsulant. The adhesion promoter layer and the oxide layer are laterally sandwiched between the through via and the encapsulant. A bottom portion of the encapsulant is longitudinally sandwiched between the adhesion promoter layer and the polymer layer.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hung-Chun Cho, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao, Wei-Chih Chen
  • Patent number: 11948904
    Abstract: A die includes a substrate, a conductive pad, a connector and a protection layer. The conductive pad is disposed over the substrate. The connector is disposed on the conductive pad. The connector includes a seed layer and a conductive post. The protection layer laterally covers the connector. Topmost surfaces of the seed layer and the conductive post and a top surface of the protection layer are level with each other.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih Chen, Hung-Jui Kuo, Yu-Hsiang Hu, Sih-Hao Liao
  • Patent number: 11940848
    Abstract: An electronic device display may have pixels formed from crystalline semiconductor light-emitting diode dies, organic light-emitting diodes, or other pixel structures. The pixels may be formed on a display panel substrate. A display panel may extend continuously across the display or multiple display panels may be tiled in two dimensions to cover a larger display area. Interconnect substrates may have outwardly facing contacts that are electrically shorted to corresponding inwardly facing contacts such as inwardly facing metal pillars associated with the display panels. The interconnect substrates may be supported by glass layers. Integrated circuits may be embedded in the display panels and/or in the interconnect substrates. A display may have an active area with pixels that includes non-spline pixels in a non-spline display portion located above a straight edge of the display and spline pixel in a spline display portion located above a curved edge of the display.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: March 26, 2024
    Assignee: Apple Inc.
    Inventors: Elmar Gehlen, Zhen Zhang, Francois R. Jacob, Paul S. Drzaic, Han-Chieh Chang, Abbas Jamshidi Roudbari, Anshi Liang, Hopil Bae, Mahdi Farrokh Baroughi, Marc J. DeVincentis, Paolo Sacchetto, Tiffany T. Moy, Warren S. Rieutort-Louis, Yong Sun, Jonathan P. Mar, Zuoqian Wang, Ian D. Tracy, Sunggu Kang, Jaein Choi, Steven E. Molesa, Sandeep Chalasani, Jui-Chih Liao, Xin Zhao, Izhar Z. Ahmed
  • Patent number: 11937932
    Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: March 26, 2024
    Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, TUNGHAI UNIVERSITY
    Inventors: Chieh-Liang Wu, Chun-Te Huang, Cheng-Hsu Chen, Tsai-Jung Wang, Kai-Chih Pai, Chun-Ming Lai, Min-Shian Wang, Ruey-Kai Sheu, Lun-Chi Chen, Yan-Nan Lin, Chien-Lun Liao, Ta-Chun Hung, Chien-Chung Huang, Chia-Tien Hsu, Shang-Feng Tsai
  • Patent number: 11942509
    Abstract: A light-emitting device comprises a substrate; a first light-emitting unit and a second light-emitting unit formed on the substrate, each of the first light-emitting unit and the second light-emitting unit comprises a first semiconductor layer, a second semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, wherein the first light-emitting unit comprises a first semiconductor mesa and a first surrounding part surrounding the first semiconductor mesa, and the second light-emitting unit comprises a second semiconductor mesa and a second surrounding part surrounding the second semiconductor mesa; a trench formed between the first light-emitting unit and the second light-emitting unit and exposing the substrate; a first insulating layer comprising a first opening on the first surrounding part and a second opening on the second semiconductor layer of the second light-emitting unit; and a connecting electrode comprising a first connecting part on the first
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: March 26, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, I-Lun Ma, Bo-Jiun Hu, Yu-Ling Lin, Chien-Chih Liao
  • Patent number: 11935981
    Abstract: A photo-detecting device includes a first semiconductor layer with a first dopant, a light-absorbing layer, a second semiconductor layer, and a semiconductor contact layer. The second semiconductor layer is located on the first semiconductor layer and has a first region and a second region, the light absorbing layer is located between the first semiconductor layer and the second semiconductor layer and has a third region and a fourth region, the semiconductor contact layer contacts the first region. The first region includes a second dopant and a third dopant, the second region includes second dopant, and the third region includes third dopant. The semiconductor contact layer has a first thickness greater than 50 ? and smaller than 1000 ?.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 19, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chu-Jih Su, Chia-Hsiang Chou, Wei-Chih Peng, Wen-Luh Liao, Chao-Shun Huang, Hsuan-Le Lin, Shih-Chang Lee, Mei Chun Liu, Chen Ou
  • Publication number: 20240068754
    Abstract: A heat dissipation module used for an electronic device is provided. The electronic device has a heat source. The heat dissipation module includes an evaporator, a plurality of heat conducting components, a pipe connected to the evaporator to form a loop, and a working fluid filled in the loop. An exterior of the evaporator has a heat conducting zone thermally contacted with the heat source to absorb heat generated from the heat source. The heat conducting components are disposed in the evaporator, located at an interior of the evaporator corresponding to the heat conducting zone. The heat conducting components are in pillar shape or rib shape respectively. The working fluid in liquid passes through the evaporator, absorbs heat, and is transformed into vapor to flow out of the evaporator. Each of the heat conducting components in rib shape is oriented in a flow direction of the working fluid.
    Type: Application
    Filed: November 9, 2023
    Publication date: February 29, 2024
    Applicant: Acer Incorporated
    Inventors: Yung-Chih Wang, Jau-Han Ke, Wen-Neng Liao, Cheng-Wen Hsieh
  • Publication number: 20240071949
    Abstract: Devices and methods for forming a chip package structure including a package substrate, a first adhesive layer attached to a top surface of the package substrate, and a beveled stiffener structure attached to the package substrate. The beveled stiffener structure may include a bottom portion including a tapered top surface, in which a bottom surface of the bottom portion is in contact with the first adhesive layer, a second adhesive layer attached to the tapered top surface, and a top portion including a tapered bottom surface, in which the tapered bottom surface is in contact with the second adhesive layer. The tapered top surface and the tapered bottom surface have a taper angle between 5 degrees and 60 degrees with respect to a top surface of the package substrate.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Inventors: Chia-Kuei Hsu, Ming-Chih Yew, Li-Ling Liao, Shin-Puu Jeng
  • Patent number: 11911951
    Abstract: A matte film for hot pressing and a manufacturing method thereof are provided. The manufacturing method includes steps of forming at least one polyester composition into an unstretched polyester thick film and stretching the unstretched polyester thick film in a machine direction (MD) and a transverse direction (TD). The polyester composition includes 81% to 97.9497% by weight of a polyester resin, 0.02% to 2% by weight of an antioxidative ingredient, 0.0003% to 1% by weight of a nucleating agent, 0.01% to 2% by weight of a flow aid, 0.01% to 2% by weight of a polyester modifier, 0.01% to 2% by weight of an inorganic filler, and 2% to 10% by weight of silica particles. The polyester resin has an intrinsic viscosity between 0.60 dl/g and 0.80 dl/g.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: February 27, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wen-Cheng Yang, Wen-Jui Cheng, Chia-Yen Hsiao, Chien-Chih Lin
  • Patent number: 11910086
    Abstract: An information handling system camera captures visual images of light directed by a lens towards an image sensor. The camera has an active illumination privacy shutter that disables the image sensor from capturing visual images by introducing illumination between the lens and image sensor, such as with a red light emitting diode that is seen as a red dot at the lens when viewed from in front of the camera. In one embodiment, the illumination is directed towards a light diffuser, such as a sheet of acrylic, that extends between the lens and image sensor when the camera is commanded to a privacy mode.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: February 20, 2024
    Assignee: Dell Products L.P.
    Inventors: Chien-Chih Liao, Chih-Hao Kao, Ghee Beng Ooi, Yi-Hsien Lin
  • Patent number: 11908975
    Abstract: An optoelectronic device includes a first semiconductor layer, a second semiconductor layer and an active layer between the first semiconductor layer and the second semiconductor layer; a first insulating layer on the second semiconductor layer and including a plurality of first openings exposing the first semiconductor layer, wherein the first openings include a first group and a second group; a third electrode on the first insulating layer and including a first extended portion and a second extended portion, wherein the first extended portion and the second extended portion are respectively electrically connected to the first semiconductor layer through the first group of the first openings and the second group of the first openings, and wherein the number of the first group of the first openings is different from the number of the second group of the first openings; and a plurality of fourth electrodes on the second insulating layer and electrically connected to the second semiconductor layer, wherein in a
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: February 20, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chao-Hsing Chen, Jia-Kuen Wang, Chien-Chih Liao, Tzu-Yao Tseng, Tsun-Kai Ko, Chien-Fu Shen
  • Publication number: 20240040244
    Abstract: An information handling system camera captures visual images of light directed by a lens towards an image sensor. The camera has an active illumination privacy shutter that disables the image sensor from capturing visual images by introducing illumination between the lens and image sensor, such as with a red light emitting diode that is seen as a red dot at the lens when viewed from in front of the camera. In one embodiment, the illumination is directed towards a light diffuser, such as a sheet of acrylic, that extends between the lens and image sensor when the camera is commanded to a privacy mode.
    Type: Application
    Filed: July 28, 2022
    Publication date: February 1, 2024
    Applicant: Dell Products L.P.
    Inventors: Chien-Chih Liao, Chih-Hao Kao, Ghee Beng Ooi, Yi-Hsien Lin