Abstract: A method of activating an update of a home screen of a mobile communications device is provided. The home screen is displayed on a display panel of the mobile communications device. The home screen includes a plurality of tiles displaying a plurality of feeds from one or more feed sources. The method includes performing one of updating the home screen or activating and displaying a menu bar on the display panel based on a distance of a downward scrolling on a top page of a home screen. A non-transitory computer-readable medium and a mobile communications device for activating an update of a home screen of a mobile communications device are also provided.

Abstract: A method for forming an interconnect structure includes forming a dielectric layer overlying a substrate, forming an opening in the dielectric layer, forming a metal-containing layer overlying the opening in the dielectric layer, forming a conformal protective layer overlying the metal-containing layer, filling a conductive layer in the opening, and performing a thermal process to form a metal oxide layer barrier layer underlying the metal-containing layer.

Abstract: A light emitting diode package structure allows for an improved light-emitting efficiency by including a first reflecting material layer with through holes; a flip chip on the first reflecting material layer, with the electrodes inlaid in the through holes of the first reflecting material layer; a first transparent material layer surrounding the side surface of the flip chip except the electrodes; and a second reflecting material layer surrounding the first transparent material layer. An interface between the first transparent material layer and the reflecting material layer is an inclined plane, an arc plane, or an irregular shape, to thereby facilitate upward light reflection of the flip chip. A wavelength conversion material layer is over the first reflecting material layer, the flip chip, and the second reflecting material layer.

Abstract: A modular structure of a fuel cell is provided, which includes a membrane electrode assembly (MEA), at least one first electrode plate, at least one second electrode plate, at least one first fixing element and at least one second fixing element. The first electrode plate is disposed at one side of the MEA and has at least one first through hole. The second electrode plate is disposed at the other side of the MEA and has at least one second through hole corresponding to the first through hole. The first fixing element and the second fixing element correspond to each other, and are joined to each other through the first through hole and the second through hole to fix the first electrode plate and the second electrode plate for the first electrode plate, the MEA and the second electrode plate to form a single cell module.

Abstract: A display device including a housing, a display module, a carrier and a color correction module is provided. The display module is disposed in the housing and exposes a display plane, which faces a first direction vertical to the display plane. The carrier is movably connected to the housing and disposed outside the housing or disposed on a back side of the display module. The back side faces to a second direction opposite to the first direction. The color correction module is disposed on the carrier and has a sensing face. The carrier is selectively disposed at a first position or a second position with respect to the housing. When the carrier is at the second position, the sensing face of the color correction module is moved to face the display plane.

Abstract: Neural signal recording apparatus and method is described, in which a micro electrode array is utilized for performing a weighted matrix as a moving window providing superpositioning of electrode signals. A voltage distribution across the electrode array is determined as a Laplacian. The apparatus and method can be utilized in a variety of electrode sensing applications involving registering neural activity, and for electrode stimulation applications, or combinations thereof.

Abstract: A piezoresistive microphone includes a substrate, an insulating layer, and a polysilicon layer. A first pattern is disposed within the polysilicon layer. The first pattern includes numerous first opening. A second pattern is disposed within the polysilicon layer. The second pattern includes numerous second openings. The first pattern surrounds the second pattern. Each first opening and each second opening are staggered. A first resistor is disposed in the polysilicon and between the first pattern and the second pattern. The first resistor is composed of numerous first heavily doped regions and numerous first lightly doped regions. The first heavily doped regions and the first lightly doped regions are disposed in series. The first heavily doped region and the first lightly doped region are disposed alternately. A cavity is disposed in the insulating layer and the substrate.

Abstract: Disclosed is a two rack unit chassis and low profile tool-less hard disk drive carrier (HDD). The two rack chassis including a plurality of HDD bays and a backplane including a plurality of connectors corresponding to the plurality of bays, each bay configured to receive a low profile tool-less carrier. The low profile tool-less carriers each comprising a first latch configured to release a sidewall of the low profile tool-less carrier and receive an HDD, a second latch configured to release a lever having at least one protraction at an inward end, and the lever configured to couple the at least one protrusion of the low profile tool-less carrier to the connector of the corresponding bay to which the low profile tool-less carrier is inserted.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate, an interfacial layer formed over the substrate, and an insertion layer formed over the interfacial layer. The semiconductor structure further includes a gate dielectric layer formed over the insertion layer and a gate structure formed over the gate dielectric layer. The insertion layer and the gate dielectric layer may be metal oxides where the insertion layer has an oxygen coordination number greater than the gate dielectric layer.

Abstract: A power adapting box and a fan module are provided. The power adapting box includes a box body, a plurality of first power adapters, an expansion socket and a plurality of second power adapters. The first power adapters are disposed in the box body. The expansion socket is detachably disposed in the box body. The second power adapters are disposed in the expansion socket.

Abstract: A micro-electro-mechanical (MEMS) structure and a method for forming the same are disclosed. The MEMS structure includes a sacrificial layer, a lower dielectric film, an upper dielectric film, a plurality of through holes and a protective film. The sacrificial layer comprises an opening. The lower dielectric film is on the sacrificial layer. The upper dielectric film is on the lower dielectric film. The plurality of through holes passes through the lower dielectric film and the upper dielectric film. The protective film covers side walls of the upper dielectric film and the lower dielectric film and a film interface between the lower dielectric film and the upper dielectric film.

Abstract: A Thunderbolt sharing console includes a high speed switch electrically coupled to at least one Thunderbolt host, a MCU coupled to the high speed switch, and a Thunderbolt interface chip coupled to the high speed switch, wherein the MCU can be used to control the high speed switch for determining which one of the at least one Thunderbolt host is coupled to the Thunderbolt interface chip.

Abstract: Methods of adaptive transform type based on transform unit (TU) size for enhancement layer (EL) coding and multiple motion candidates for EL coding based on corresponding base layer (BL) video data are provided. One method selects a transform type from multiple allowable transform types based on the TU size and applies the selected transform type to the transform units of the inter-layer prediction processed data. Another method derives multiple motion candidates for the EL video data coded in Merge mode or Inter mode based on motion information associated with the corresponding BL video data.

Abstract: Structures and formation methods of a chip package are provided. The method includes disposing a semiconductor die over a carrier substrate and forming a protection layer over the carrier substrate to surround the semiconductor die. The method also includes forming a dielectric layer over the protection layer and the semiconductor die. The method further includes cutting an upper portion of the dielectric layer to improve flatness of the dielectric layer. In addition, the method includes forming a conductive layer over the dielectric layer after cutting the upper portion of the dielectric layer.

Abstract: The techniques described herein relate to methods, apparatus, and computer readable media configured to encode an image or video. A slice is partitioned into a set of first units. For each first unit in the set of first units, the first unit is partitioned into a set of second units. The partitioning includes, for each second unit in the set of second units, determining whether the second unit satisfies a predetermined constraint. If the second unit does not satisfy the predetermined constraint, a first set of partitioning techniques is tested to partition the second unit. If the second unit satisfies the predetermined constraint, the first set of partitioning techniques and a second set of partitioning techniques are tested to partition the second unit. The second unit is partitioned using a technique from the first set of partitioning techniques or the second set of partitioning techniques identified by the testing.

Abstract: Provided is a biological sensing system, including a nanowire field-effect transistor and a sensing chip. A gate terminal of the nanowire FET surrounds a gate of a silicon nanowire or a gate of a silicon nanobelt, diameter of the silicon nanowire is less than 20 nm. A sensing electrode of the sensing chip is coupled to the gate terminal of the nanowire FET. An area ratio of an electrode area of the sensing electrode to a total sensing chip area, a thickness ratio of an oxide thickness of sensing electrode to a bulk oxide dielectric film thickness of the sensing chip and a capacitance ratio of an electrode capacitor of the sensing electrode to a gate capacitor of the silicon nanowire or a gate capacitor of the silicon nanobelt are optimized by means of an equivalent circuit so that potential coupling efficiency between sensing electrode and gate is optimized.

Abstract: The method of dynamically adjusting frame aggregation size for a first communication device receiving aggregation packets from a second communication device in a wireless communication system is disclosed. The method comprises monitoring a buffered data size of the first communication device, and notifying the second communication device of a capable buffer size of the first communication device when the buffered data size monitored by the first communication device is higher than a threshold.

Abstract: Concepts and examples pertaining to coding unit information inheritance are described. A processor of an encoder may receive media contents and encode the media contents to provide a bitstream of encoded media contents. A processor of a decoder may receive the bitstream of encoded media contents and decode the bitstream to provide one or more streams of decoded media contents. The bitstream may include information indicating coding unit (CU) information inheritance that is used by a decoder in conjunction with quad-tree (QT) partition and binary-tree (BT) partition to achieve asymmetric or triple-tree (TT) partition of a CU.

Abstract: Structures and formation methods of a chip package are provided. The method includes forming multiple conductive structures over a carrier substrate and disposing a semiconductor die over the carrier substrate. The method also includes disposing a mold over the carrier substrate. The method further includes forming a protection layer between the mold and the carrier substrate to surround the semiconductor die and the conductive structures. In addition, the method includes removing the mold.

Abstract: A sticky note pad includes a stack of note sheets. Each of the note sheets includes: a substrate having a writing face and a back face opposite to the writing face, the back face having a central portion and a peripheral portion surrounding the central portion; and an adhesive layer positioned on the central portion of the back face.