Patents by Inventor Chih-An Wei

Chih-An Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8803234
    Abstract: A high voltage (HV) semiconductor device includes: a semiconductor substrate having a first conductivity type; a gate structure disposed over a portion of the semiconductor substrate; a pair of spacers respectively disposed over a sidewall of the gate structure, wherein one of the spacers is a composite spacer comprising a first insulating spacer contacting the gate structure, a dummy gate structure, and a second insulating spacer; a first drift region disposed in a portion of the semiconductor, underlying a portion of the gate structure and one of the pair of spacers, having a second conductivity type opposite to the first conductivity type; and a pair of doping regions, respectively disposed in a portion of the semiconductor substrate on opposite sides of the gate structure, wherein the pair of doping regions include the second conductivity type and one of the doping regions is disposed in the first drift region.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: August 12, 2014
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Chih-Cherng Liao, Yun-Chou Wei, Pi-Kuang Chuang, Ching-Yi Hsu, Chih-Wei Lin, Wen-Chung Chen, Che-Hua Chang, Yung-Lung Chou, Chung-Te Chou, Cheng-Lun Cho, Ya-Han Liang
  • Publication number: 20140220894
    Abstract: A method of switching pairing between Bluetooth devices is disclosed. In one embodiment, the method is adapted to a Bluetooth server and two Bluetooth clients. The method enables the first Bluetooth client to interchange its pairing information with the Bluetooth server and the second Bluetooth client. Therefore, the Bluetooth server could use the interchanged pairing information to quickly connect with the second Bluetooth client.
    Type: Application
    Filed: January 23, 2014
    Publication date: August 7, 2014
    Inventors: Chih-Wei Chen, Sheng-Hung Wang
  • Publication number: 20140218492
    Abstract: A display device includes a display panel and a phase retarder film disposed on the display panel. The display panel has a first pixel region, a second pixel region and a third pixel region disposed between the first pixel region and the second pixel region. The phase retarder film has a first phase region, a second phase region and a third phase region disposed between the first phase region and the second phase region. The first phase region is disposed corresponding to the first pixel region, the second phase region is disposed corresponding to the second pixel region, and the third phase region is disposed corresponding to the third pixel region. A phase retardation of the third phase region is different from phase retardations of the first phase region and the second phase region. A method for manufacturing the phase retarder film is also provided.
    Type: Application
    Filed: July 15, 2013
    Publication date: August 7, 2014
    Inventors: Wen-Fang SUNG, Wang-Shuo KAO, Chih-Wei CHEN
  • Publication number: 20140220335
    Abstract: A colored matting powder includes particles containing a polyimide obtained by reacting diamine and dianhydride monomers at a substantially equal molar ratio, and a pigment incorporated with the polyimide, a portion of the pigment being located at an outer surface of the particles. Moreover, a colored polyimide film is also described as incorporating the colored matting powder, and can exhibit low gloss, low transparency and good insulation.
    Type: Application
    Filed: January 27, 2014
    Publication date: August 7, 2014
    Applicant: TAIMIDE TECHNOLOGY INCORPORATION
    Inventors: Chih-Wei Lin, Wu-Yung Yang
  • Publication number: 20140211848
    Abstract: A method and apparatus for deblocking of reconstructed video are disclosed. In one embodiment, the method divides a block boundary into two sub-boundaries and separates lines or column across the sub-boundaries into two groups. The deblocking filter decision for each group is determined based on the lines or columns in the respective group. In another embodiment, the method divides block edges of blocks in the LCUs into two edge groups, where the first edge group corresponds to horizontal block edges between two LCUs and the second edge group corresponds to remaining block edges not included in the first edge group. The number of lines processed by a vertical filter in the first edge group is less than the number of lines processed by a vertical filter in the second edge group. Accordingly, a system embodying the present invention has reduced storage requirement.
    Type: Application
    Filed: August 9, 2012
    Publication date: July 31, 2014
    Applicant: MEDIA TEK INC.
    Inventors: Chih-Wei Hsu, Qian Huang, Jicheng An, Xun Guo, Yu-Wen Huang, Shaw-Min Lei
  • Patent number: 8791528
    Abstract: A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening. The metal-silicide layer may then be annealed.
    Type: Grant
    Filed: August 23, 2010
    Date of Patent: July 29, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Tung Lin, Chih-Wei Chang, Chii-Ming Wu, Mei-Yun Wang, Chaing-Ming Chuang, Shau-Lin Shue
  • Patent number: 8791579
    Abstract: A device includes a plurality of connectors on a top surface of a package component. The plurality of connectors includes a first connector having a first lateral dimension, and a second connector having a second lateral dimension. The second lateral dimension is greater than the first lateral dimension. The first and the second lateral dimensions are measured in directions parallel to a major surface of the package component.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: July 29, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wei Lai, Ming-Che Ho, Tzong-Hann Yang, Chien Rhone Wang, Chia-Tung Chang, Hung-Jui Kuo, Chung-Shi Liu
  • Patent number: 8791981
    Abstract: A bit rate control apparatus applied in a video conference system is provided. The apparatus has a bit rate recording unit, configured to update a current bit rate; a bit rate reducing unit, configured to receive at least one event parameter and the current bit rate, and determine whether an event flag corresponding to the event parameters occurs; and a bit rate increasing unit, configured to increase the current bit rate periodically, wherein when the event flag occurs, the bit rate reducing unit reduces the current bit rate.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: July 29, 2014
    Assignee: Quanta Computer Inc.
    Inventors: Chun-Hsiung Fang, Rong-Quen Chen, Chih-Yin Lin, Chih-Wei Tuan
  • Publication number: 20140207269
    Abstract: The present disclosure relates to an APC method and tool architecture to elaborate process stability, comprising a two-loop architecture for fine tuning by an APC loop and recovery tuning by an equipment performance optimization (EPO) loop of one or more process parameters. Fine tuning by the APC loop comprises neutralization of systematic drifts from manufacturing tool or the manufacturing process itself. Recovery tuning by the EPO loop comprises aligning processing tool conditions with their tool baseline configuration. The APC method and tool architecture establishes switching criteria for fine tuning of process parameters and recovery tuning of equipment parameters. A synergy mechanism is further established between the two loops, wherein adjustments to equipment parameters made by the EPO loop are recognized by the APC loop to avoid double-tuning. The APC method and tool architecture results in manufacturing process stability within a manufacturing process module.
    Type: Application
    Filed: January 24, 2013
    Publication date: July 24, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Chih-Wei Hsu
  • Publication number: 20140203537
    Abstract: A movement assistive device includes a vertical lift module and a horizontal extension module. The vertical lift module has a lift table vertically movable upward and downward. The horizontal extension module is arranged atop the lift table to move upward and downward along with the lift table and can be driven to switch horizontally between a first state and a second state. A wheelchair equipped with the movement assistive device is also disclosed. With the movement assistive device, the wheelchair can be vertically lifted and lowered as well as be horizontally displaced, and can therefore be conveniently moved from a ground surface onto a carrier and vice versa.
    Type: Application
    Filed: January 15, 2014
    Publication date: July 24, 2014
    Inventor: Amy Chih-Wei Chiu
  • Patent number: 8788205
    Abstract: Example apparatus and methods concern rigorous survey-plan based sensor data collection where physical survey locations are correlated to logical locations rather than being tightly coupled to physical map locations. An embodiment includes accessing a venue map and a survey plan associated with the venue map. A survey plan includes a survey path defined by one or more logical survey points. A logical survey point includes a unique co-ordinate free identifier, a description of a recognizable location in the venue, and a co-ordinate configured to register the logical survey point to the corresponding venue map. A surveyor surveys the venue using the survey plan. Surveying the venue includes following the survey plan and acquiring sensor fingerprints at sensor reading points along the survey path. A fingerprint observation data store is populated with survey points that are registered to the survey plan. Survey points include sensor fingerprint data and correlation data.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: July 22, 2014
    Inventors: Jyh-Han Lin, Chih-Wei Wang, Steve DiAcetis
  • Patent number: 8788980
    Abstract: The invention is directed to a method for checking a die seal ring on a layout. The method comprises steps of receiving a digital database of a layout corresponding to at least a device with a text information corresponding to the layout. Tape-out information corresponding to the layout is received. A checking process is performed according to the digital database of the layout and the tape-out information and, meanwhile, a mask design procedure for designing a mask pattern corresponding to the layout is performed by using the digital database of the layout, the text information and the tape-out information. A result of the checking process is recorded in an inspection table corresponding to the layout.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: July 22, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Jui-Yun Chang, Jian-Cheng Chen, I-Jen Kao, Chih-Wei Hsu
  • Patent number: 8787934
    Abstract: A method and system for managing images and associated geographic location data in a mobile device uses an integrated camera to generate one or more images. After generating an image, the system determines a geographic location associated with the image. The system then stores the image, the associated geographic location data, and a record of the association in the mobile device's storage component. The system may also associate supplemental information, such as telephone number, category, and street address, with the image. The system provides one or more display modes for displaying the image and the associated information. The display modes may include a list mode for displaying multiple images and portions of the associated data and a detail mode for displaying a selected image and the full set of associated data. The system may also provide a map display mode for displaying locations associated with one or more images on a map of a geographical area.
    Type: Grant
    Filed: May 7, 2013
    Date of Patent: July 22, 2014
    Assignee: HTC Corporation
    Inventors: John C. Wang, Shu-Fang Hsu, Chih-Wei Cheng
  • Publication number: 20140198844
    Abstract: A method and apparatus for loop filter processing of video data are disclosed. Embodiments according to the present invention eliminate data dependency associated with loop processing across tile boundaries. According to one embodiment, loop processing is reconfigured to eliminate data dependency across tile boundaries if cross-tile loop processing is disabled. The loop filter processing corresponds to DF (deblocking filter), SAO (Sample Adaptive Offset) processing or ALF (Adaptive Loop Filter) processing. The processing can be skipped for at least one tile boundary. In another embodiment, data padding based on the pixels of the current tile or modifying pixel classification footprint are used to eliminate data dependency across the tile boundary. Whether cross-tile loop processing is disabled can be indicated by a flag coded at sequence, picture, or slice level to indicate whether the data dependency across said at least one tile boundary is allowed.
    Type: Application
    Filed: October 19, 2012
    Publication date: July 17, 2014
    Inventors: Chih-Wei Hsu, Chia-Yang Tsai, Yu-Wen Huang
  • Publication number: 20140197538
    Abstract: The present disclosure is directed to an interconnect structure. The metal interconnect structure has a metal body disposed over a semiconductor substrate and a projection extending from the metal body. A barrier layer continuously extends over the projection from a first sidewall of metal body to an opposing second sidewall of the metal body. A layer of dielectric material is disposed over the semiconductor substrate at a position abutting the metal body and the projection.
    Type: Application
    Filed: March 18, 2014
    Publication date: July 17, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Wei Lu, Chung-Ju Lee, Hsiang-Huan Lee, Tien-I Bao
  • Publication number: 20140198884
    Abstract: A communication system includes: a frequency synthesizer, configured to reference a radio frequency (RF) signal, in a device including: a ring oscillator with track-and-hold circuit electrically connected to a reference clock, a bank of comparators, electrically connected to the ring oscillator with track-and-hold circuit, configured to measure a coarse timing, and an analog-to-digital converter, electrically connected to the ring oscillator with track-and-hold circuit, configured to generate a fine timing; a communication interface, electrically connected to the frequency synthesizer, is configured to receive a device transmission; and a control unit, electrically connected to the communication interface, is configured to display a receiver data from the a radio frequency (RF) signal.
    Type: Application
    Filed: January 10, 2014
    Publication date: July 17, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Chih-Wei Yao
  • Patent number: 8779468
    Abstract: A nitride semiconductor structure including a silicon substrate, a nucleation layer, a discontinuous defect blocking layer, a buffer layer and a nitride semiconductor layer is provided. The nucleation layer disposed on the silicon substrate, wherein the nucleation layer has a defect density d1. A portion of the nucleation layer is covered by the discontinuous defect blocking layer. The buffer layer is disposed on the discontinuous defect blocking layer and a portion of the nucleation layer that is not covered by the discontinuous defect blocking layer. The nitride semiconductor layer is disposed on the buffer layer. A ratio of a defect density d2 of the nitride semiconductor layer to the defect density d1 of the nucleation layer is less than or equal to about 0.5, at a location where about 1 micrometer above the interface between the nitride semiconductor layer and the buffer layer.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: July 15, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Yen-Hsiang Fang, Chien-Pin Lu, Chen-Zi Liao, Rong Xuan, Yi-Keng Fu, Chih-Wei Hu, Hsun-Chih Liu
  • Patent number: 8776870
    Abstract: Disclosed is a device whereby the thermal conductance of a multiwalled nanostructure such as a multiwalled carbon nanotube (MWCNT) can be controllably and reversibly tuned by sliding one or more outer shells with respect to the inner core. As one example, the thermal conductance of an MWCNT dropped to 15% of the original value after extending the length of the MWCNT by 190 nm. The thermal conductivity returned when the tube was contracted. The device may comprise numbers of multiwalled nanotubes or other graphitic layers connected to a heat source and a heat drain and various means for tuning the overall thermal conductance for applications in structure heat management, heat flow in nanoscale or microscale devices and thermal logic devices.
    Type: Grant
    Filed: May 6, 2009
    Date of Patent: July 15, 2014
    Assignee: The Regents of the University of California
    Inventors: Chih-Wei Chang, Arunava Majumdar, Alexander K. Zettl
  • Publication number: 20140193232
    Abstract: An apparatus for flipping a semiconductor device comprises a platform comprising a carrier and a roller system, a positioning unit above the platform and comprising a circular opening, and an elevating unit connecting the platform and the positioning unit.
    Type: Application
    Filed: January 8, 2014
    Publication date: July 10, 2014
    Applicant: Epistar Corporation
    Inventors: Chih-Wei WEI, Chia-Liang HSU
  • Patent number: D710350
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: August 5, 2014
    Assignee: Trimble Navigation Limited
    Inventors: Gerald Steiger, Robert Barnwell Elliot Puckette, Jonathan Musch, John Cronkrite, Chun-Han Chen, Chih Wei Chen, Kuo-chan Huang, Ioannis Alexandros Stasinopoulos, Ming-Hsueh Tsai, Nick Vasiljevic