Patents by Inventor Chih-Chan Lu

Chih-Chan Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Optical proximity correction for active region design layout
    Patent number: 8775982
    Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.
    Type: Grant
    Filed: June 25, 2013
    Date of Patent: July 8, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mei-Hsuan Lin, Chih-Chan Lu, Chih-Hsun Lin, Chih-Kang Chao, Ling-Sung Wang, Jen-Pan Wang
  • OPTICAL PROXIMITY CORRECTION FOR ACTIVE REGION DESIGN LAYOUT
    Publication number: 20130285194
    Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.
    Type: Application
    Filed: June 25, 2013
    Publication date: October 31, 2013
    Inventors: Mei-Hsuan Lin, Chih-Chan Lu, Chih-Hsun Lin, Chih-Kang Chao, Ling-Sung Wang, Jen-Pan Wang
  • Optical proximity correction for active region design layout
    Patent number: 8533639
    Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: September 10, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mei-Hsuan Lin, Chih-Chan Lu, Chih-Hsun Lin, Chih-Kang Chao, Ling-Sung Wang, Jen-Pan Wang
  • OPTICAL PROXIMITY CORRECTION FOR ACTIVE REGION DESIGN LAYOUT
    Publication number: 20130069162
    Abstract: The present disclosure provides an integrated circuit design method. In an example, a method includes receiving an integrated circuit design layout that includes an active region feature, a contact feature, and an isolation feature, wherein a portion of the active region feature is disposed between the contact feature and the isolation feature; determining whether a thickness of the portion of the active region feature disposed between the contact feature and the isolation feature is less than a threshold value; and modifying the integrated circuit design layout if the thickness is less than the threshold value, wherein the modifying includes adding a supplementary active region feature adjacent to the portion of the active region feature disposed between the contact feature and the isolation feature.
    Type: Application
    Filed: September 15, 2011
    Publication date: March 21, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Mei-Hsuan Lin, Chih-Chan Lu, Chih-Hsun Lin, Chih-Kang Chao, Ling-Sung Wang, Jen-Pan Wang