Abstract: An antenna structure capable of transmitting a WiGig band for a head-mounted wireless transmission display device including a display screen and an overhead device is disclosed. The antenna structure includes at least two body portions, each of the body portions having at least a signal transceiving end, the body portions are respectively arranged at left and right sides of the display screen, and signal transceiving ends of the body portions are extended outward from the left and right sides of the display screen respectively.

Abstract: A multidrop network system includes N network devices. The N network devices include a master device and multiple slave devices, and each network device has an identification code as its own identification in the multidrop network system. The N network devices have N identification codes and obtain transmission opportunities in turn according to the N identification codes in each round of data transmission. Each network device performs a count operation to generate a current count value, and when the identification code of a network device is the same as the current count value, this network device obtains a transmission opportunity. After a device obtains the transmission opportunity, it determines whether a cut-in signal from another network device is observed in a front duration of a predetermined time slot, and then determines whether to abandon/defer the right to start transmitting in the remaining duration of the predetermined time slot.

Abstract: A high-voltage semiconductor device structure is provided. The high-voltage semiconductor device structure includes a semiconductor substrate, a source ring in the semiconductor substrate, and a drain region in the semiconductor substrate. The high-voltage semiconductor device structure also includes a doped ring surrounding sides and a bottom of the source ring and a well region surrounding sides and bottoms of the drain region and the doped ring. The well region has a conductivity type opposite to that of the doped ring. The high-voltage semiconductor device structure further includes a conductor electrically connected to the drain region and extending over and across a periphery of the well region. In addition, the high-voltage semiconductor device structure includes a shielding element ring between the conductor and the semiconductor substrate. The shielding element ring extends over and across the periphery of the well region.

Abstract: An access point (AP) and a station (STA) communicate with each other, with the AP indicating to the STA either or both of a preamble detection (PD) channel and a signaling (SIG) content channel and with the STA being initially monitoring a primary frequency segment of a plurality of frequency segments in an operating bandwidth of the AP. A downlink (DL) or triggered uplink (UL) communication is performed between the AP and the STA during a transmission opportunity (TXOP) such that: (i) during the TXOP, the STA monitors a preamble on the PD channel and decodes a SIG content on the SIG content channel; and (ii) after an end of the TXOP, the STA switches to the primary frequency segment.

Abstract: A method for manufacturing a nanosheet semiconductor device includes forming a poly gate on a nanosheet stack which includes at least one first nanosheet and at least one second nanosheet alternating with the at least one first nanosheet; recessing the nanosheet stack to form a source/drain recess proximate to the poly gate; forming an inner spacer laterally covering the at least one first nanosheet; and selectively etching the at least one second nanosheet.

Abstract: A replacement device includes a replacement module and a slider. The replacement module includes a sliding portion. The sliding portion is provided with a limiting column, which is formed with a fixing hole. The slider includes a slider body. The slider body is provided with a first latch, a limiting hole and a fixing element, wherein the first latch is arranged on a first side edge of the slider body. The slider is correspondingly arranged on the sliding portion of the replacement module, and the limiting column of the sliding portion passes through the limiting hole. The fixing element has a top portion, and is fixed in the fixing hole. The size of the top portion is greater than the size of the limiting hole, so that the slider moves relative to the replacement module within a limit range of the limiting hole.

Abstract: A semiconductor process system includes a process chamber. The process chamber includes a wafer support configured to support a wafer. The system includes a bell jar configured to be positioned over the wafer during a semiconductor process. The interior surface of the bell jar is coated with a rough coating. The rough coating can include zirconium.

Abstract: In a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer.

Abstract: The present invention provides a transmitter including a mixer, a harmonic impedance adjustment circuit and an amplifier. The mixer is configured to mix a first baseband signal with a first oscillation signal to generate a first mixed signal to a first node, and to mix a second baseband signal with a second oscillation signal to generate a second mixed signal to a second node. The harmonic impedance adjustment circuit is coupled between the first node and the second node, and is configured to reduce harmonic components of the first mixed signal and the second mixed signal to generate an adjusted first mixed signal and an adjusted second mixed signal. The amplifier is coupled to the harmonic impedance adjustment circuit, and is configured to generate an amplified signal according to the adjusted first mixed signal and the adjusted second mixed signal.

Abstract: According to one example, a semiconductor device includes a substrate and a fin stack that includes a plurality of nanostructures, a gate device surrounding each of the nanostructures, and inner spacers along the gate device and between the nanostructures. A width of the inner spacers differs between different layers of the fin stack.

Abstract: An optical system is provided. The optical system includes a light source used for generating light, a fixed portion, an optical assembly having an equivalent focal length to the light and including a first optical element and a second optical element, and a driving assembly used for driving the second optical element to move relative to the first optical element. The driving assembly includes a first driving element used for driving the second optical element to move relative to the first optical element in a first axis, and a second driving element used for driving the second optical element to move relative to the first optical element in a second axis. The first axis and the second axis are different.

Abstract: An optical system is provided. The optical system includes a light source assembly, a light guiding element, and a first optical assembly. The light source assembly is used for generating first light and second light. The light guiding element is used for transporting the first light and the second light. The first optical assembly is disposed between the light guiding element and the light source assembly and used for transporting the first light and the second light. Wavelengths of the first light and the second light are different.

Abstract: A semiconductor structure is presented including a first memory array and a second memory array directly connected to the first memory array by nanosheet stacks and backside contacts. The first and second memory arrays collectively define a double-sided memory array on a complementary metal oxide semiconductor (CMOS) wafer. The nanosheet stacks separate the first memory array from the second memory array so that two different types of memory devices are integrated together into a single CMOS chip.

Abstract: An optical system used for displaying a target image is provided. The optical system includes a light source assembly used for generating an initial image, an optical path adjustment assembly used for transferring the initial image to the target image, a control element used for providing a first control signal to the light source assembly, and a sensing assembly used for providing a sensing signal to the control element. The control element provides the first control signal based on the sensing signal.

Abstract: A method of making a semiconductor device includes forming at least one fiducial mark on a photomask. The method further includes defining a pattern including a plurality of sub-patterns on the photomask in a pattern region. The defining the pattern includes defining a first sub-pattern of the plurality of sub-patterns having a first spacing from a second sub-pattern of the plurality of sub-patterns, wherein the first spacing is different from a second spacing between the second sub-pattern and a third sub-pattern of the plurality of sub-patterns.

Abstract: A method of correcting a misalignment of a wafer on a wafer holder and an apparatus for performing the same are disclosed. In an embodiment, a semiconductor alignment apparatus includes a wafer stage; a wafer holder over the wafer stage; a first position detector configured to detect an alignment of a wafer over the wafer holder in a first direction; a second position detector configured to detect an alignment of the wafer over the wafer holder in a second direction; and a rotational detector configured to detect a rotational alignment of the wafer over the wafer holder.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A universal wiper base assembly structure includes a fastening base, a rear base, a combination base, and an outer cover. The fastening base includes a main body and a decorative cover. The main body has a coupling hole, an insertion slot, a protruding platform, a positioning protrusion, a first shaft hole, two limiting arc surfaces, and multiple engagement grooves. The decorative cover has a fastening slot. The rear base includes two contact blocks, a top abutting block, and two hooks. The combination base includes two side plates, a connection plate, an open groove and a second shaft hole. The outer cover includes a fastening block, an opening, and a third shaft hole. Accordingly, a variety of wiper driving arms may be positioned to the universal wiper base assembly structure, so as to improve the convenience in assembling and reduce an overall cost.

Abstract: A method of forming a semiconductor transistor device. The method comprises forming a channel structure over a substrate and forming a first source/drain structure and a second source/drain structure on opposite sides of the fin structure. The method further comprises forming a gate structure surrounding the fin structure. The method further comprises flipping and partially removing the substrate to form a back-side capping trench while leaving a lower portion of the substrate along upper sidewalls of the first source/drain structure and the second source/drain structure as a protective spacer. The method further comprises forming a back-side dielectric cap in the back-side capping trench.

Abstract: Trenches in which to form a back side isolation structure for an array of CMOS image sensors are formed by a cyclic process that allows the trenches to be kept narrow. Each cycle of the process includes etching to add a depth segment to the trenches and coating the depth segment with an etch-resistant coating. The following etch step will break through the etch-resistant coating at the bottom of the trench but the etch-resistant coating will remain in the upper part of the trench to limit lateral etching and substrate damage. The resulting trenches have a series of vertically spaced nodes. The process may result in a 10% increase in photodiode area and a 30-40% increase in full well capacity.