Abstract: A semiconductor device includes a plurality of channel layers vertically separated from one another. The semiconductor device also includes an active gate structure comprising a lower portion and an upper portion. The lower portion wraps around each of the plurality of channel layers. The semiconductor device further includes a gate spacer extending along a sidewall of the upper portion of the active gate structure. The gate spacer has a bottom surface. Moreover, a dummy gate dielectric layer is disposed between the gate spacer and a topmost channel layer of plurality of channel layers. The dummy gate dielectric layer is in contact with a top surface of the topmost channel layer, the bottom surface of the gate spacer, and the sidewall of the gate structure.

Abstract: A method and apparatus for performing de-skew control are provided, where the method is applied to an electronic device. The method includes: buffering a plurality of data sequences for performing symbol detection on a plurality of channels; according to a first symbol on a first channel, determining corresponding first expected symbols on other channels to determine a plurality of candidate expected symbol positions on the other channels, respectively; according to at least one other symbol on the first channel, within the candidate expected symbol positions on the other channels, eliminating any candidate expected symbol position that does not comply with a predetermined format to obtain a plurality of expected symbol positions on the other channels; and utilizing the expected symbol positions as correct positions of the corresponding first expected symbols on the other channels to control respective data of the data sequences to be synchronously transmitted.

Abstract: Lithography methods on a semiconductor substrate are described. The methods include coating a resist layer on the substrate, wherein the resist layer comprises a resist polymer configured to turn soluble to a base solution in response to reaction with an acid, and a switchable polymer that includes a base soluble polymer having a carboxylic acid, hydroxyl, lactone, or anhydride functional group, performing a pre-exposure bake on the resist layer, exposing the resist-coated substrate, and developing the exposed substrate with a developing solution.

Abstract: Lithography methods on a semiconductor substrate are described. The methods include coating a resist layer on the substrate, wherein the resist layer comprises a resist polymer configured to turn soluble to a base solution in response to reaction with an acid, and a switchable polymer that includes a base soluble polymer having a carboxylic acid, hydroxyl, lactone, or anhydride functional group, performing a pre-exposure bake on the resist layer, exposing the resist-coated substrate, and developing the exposed substrate with a developing solution.

Abstract: A material is provided for use in an immersion lithographic process of a semiconductor substrate. The material includes a photo-sensitive polymer configured to turn soluble to a base solution in response to reaction with an acid and at least one of either a base soluble polymer or an acid labile polymer. The base soluble polymer is configured to turn soluble to water in response to reaction with a developer solution. The acid labile polymer is configured to turn soluble to water after releasing a leaving group in reaction to the acid.

Abstract: A photomask set includes at least two masks that combine to form a device pattern in a semiconductor device. Orthogonal corners may be produced in a semiconductor device pattern to include one edge defined by a first mask and an orthogonal edge defined by a second mask. The mask set may include a first mask with compensation features and a second mask with void areas overlaying the compensation features when the first and second masks are aligned with one another, such that the compensation features are removed when patterns are successfully formed from the first and second masks. The compensation features alleviate proximity effects during the formation of device features.

Abstract: A photomask set includes at least two masks that combine to form a device pattern in a semiconductor device. Orthogonal corners may be produced in a semiconductor device pattern to include one edge defined by a first mask and an orthogonal edge defined by a second mask. The mask set may include a first mask with compensation features and a second mask with void areas overlaying the compensation features when the first and second masks are aligned with one another, such that the compensation features are removed when patterns are successfully formed from the first and second masks. The compensation features alleviate proximity effects during the formation of device features.

Abstract: A photomask set includes at least two masks that combine to form a device pattern in a semiconductor device. Orthogonal corners may be produced in a semiconductor device pattern to include one edge defined by a first mask and an orthogonal edge defined by a second mask. The mask set may include a first mask with compensation features and a second mask with void areas overlaying the compensation features when the first and second masks are aligned with one another, such that the compensation features are removed when patterns are successfully formed from the first and second masks. The compensation features alleviate proximity effects during the formation of device features.

Abstract: A method for cleaning a photomask includes cleaning the photomask with a chemical cleaner, introducing a solution to the photomask, the solution is configured to react with residuals generated from the chemical cleaner to form insoluble precipitates, and rinsing the photomask with a fluid to remove the insoluble precipitates from the photomask.

Abstract: A method for cleaning a photomask includes cleaning the photomask with a chemical cleaner, introducing a solution to the photomask, the solution is configured to react with residuals generated from the chemical cleaner to form insoluble precipitates, and rinsing the photomask with a fluid to remove the insoluble precipitates from the photomask.

Abstract: A material is provided for use in an immersion lithographic process of a semiconductor substrate. The material includes a photo-sensitive polymer configured to turn soluble to a base solution in response to reaction with an acid and at least one of either a base soluble polymer or an acid labile polymer. The base soluble polymer is configured to turn soluble to water in response to reaction with a developer solution. The acid labile polymer is configured to turn soluble to water after releasing a leaving group in reaction to the acid.

Abstract: A photolithography and etch process sequence includes a photomask having a pattern with compensation features that alleviate patterning variations due to the proximity effect and depth of focus concerns during photolithography. The compensation features may be disposed near isolated or outermost lines of a device pattern. A photoresist pattern is formed to include the compensation features and the pattern etched to form a corresponding etched pattern including the compensation features. After etching, a protection material is formed over the layer and a trim mask is used to form a further photoresist pattern over the protection material. A subsequent etching pattern etches the protection material and removes the compensation features and results in the device lines being formed unaffected by proximity effects. Flare dummies may additionally be added to the mask pattern to increase pattern density and assist in endpoint detection.

Abstract: A photomask set includes at least two masks that combine to form a device pattern in a semiconductor device. Orthogonal corners may be produced in a semiconductor device pattern to include one edge defined by a first mask and an orthogonal edge defined by a second mask. The mask set may include a first mask with compensation features and a second mask with void areas overlaying the compensation features when the first and second masks are aligned with one another, such that the compensation features are removed when patterns are successfully formed from the first and second masks. The compensation features alleviate proximity effects during the formation of device features.

Abstract: A photolithography and etch process sequence includes a photomask having a pattern with compensation features that alleviate patterning variations due to the proximity effect and depth of focus concerns during photolithography. The compensation features may be disposed near isolated or outermost lines of a device pattern. A photoresist pattern is formed to include the compensation features and the pattern etched to form a corresponding etched pattern including the compensation features. After etching, a protection material is formed over the layer and a trim mask is used to form a further photoresist pattern over the protection material. A subsequent etching pattern etches the protection material and removes the compensation features and results in the device lines being formed unaffected by proximity effects. Flare dummies may additionally be added to the mask pattern to increase pattern density and assist in endpoint detection.

Abstract: A method of forming a bump on a substrate such as a semiconductor wafer or flip chip. The method includes the step of providing a semiconductor device having a contact pad and an upper passivation layer and an opening formed in the upper passivation layer exposing a portion of the contact pad. An under bump metallurgy is deposited over the upper passivation layer and the contact pad. A first photoresist layer is deposited in a liquid state so that the first photoresist layer covers the under bump metallurgy. A second photoresist layer is deposited and the second photoresist layer is a dry film photoresist. The unexposed portions of the first photoresist layer are removed. The remaining portions of the first photoresist layers are removed. The electrically conductive material is reflown to provide a bump on the semiconductor device.

Abstract: A method of forming a bump on a substrate such as a semiconductor wafer or flip chip. The method includes the step of providing a semiconductor device having a contact pad and an upper passivation layer and an opening formed in the upper passivation layer exposing a portion of the contact pad. An under bump metallurgy is deposited over the upper passivation layer and the contact pad. A first photoresist layer is deposited in a liquid state so that the first photoresist layer covers the under bump metallurgy. A second photoresist layer is deposited and the second photoresist layer is a dry film photoresist. The unexposed portions of the first photoresist layer are removed. The remaining portions of the first photoresist layers are removed. The electrically conductive material is reflown to provide a bump on the semiconductor device.