Abstract: A method for processing an integrated circuit includes forming first and second gate all around transistors. The method forms a dipole oxide in the first gate all around transistor without forming the dipole oxide in the second gate all around transistor. This is accomplished by entirely removing an interfacial dielectric layer and a dipole-inducing layer from semiconductor nanosheets of the second gate all around transistor before redepositing the interfacial dielectric layer on the semiconductor nanosheets of the second gate all around transistor.

Abstract: The present disclosure provides a battery charging system and method. The battery charging method includes: determining a degree of healthy of a battery module according to an evaluation mechanism; setting a charging standard according to the degree of healthy; by handshaking with a charger, setting a charging voltage for the charger according to the charging standard to charge the battery module; and by the charger, perform a charging operation on the battery module until a fully charged condition is satisfied.

Abstract: An exemplary embodiment of the invention provides an image processing method for a virtual reality display system. The method includes: enabling a first shared buffer and a second shared buffer; performing an image capturing operation to obtain a first image from a virtual reality scene; storing the first image to the first shared buffer; in response to that the storing of the first image is finished, reading the first image from the first shared buffer; performing a depth estimation operation on the first image to obtain depth information corresponding to the first image; storing the depth information to the second shared buffer; in response to that the storing of the depth information is finished, reading the depth information from the second shared buffer; performing an image generation operation according to the depth information to generate a pair of second images corresponding to the virtual reality scene; and outputting the pair of second images by a display of the virtual reality display system.

Abstract: A semiconductor device structure is provided. The device includes one or more first semiconductor layers, each first semiconductor layer of the one or more first semiconductor layers is surrounded by a first intermixed layer, wherein the first intermixed layer comprises a first material and a second material.

Abstract: A 3D display system and a 3D display method are provided. The 3D display system includes a 3D display, a memory, and a processor. The processor is coupled to the 3D display and the memory and is configured to execute the following steps. As a first type application program is executed, an image content of the first type application program is captured, and a stereo format image is generated according to the image content of the first type application program. The stereo format image is delivered to a runtime complying with a specific development standard through an application program interface complying with the specific development standard. A display frame processing associated with the 3D display is performed on the stereo format image through the runtime, and a 3D display image content generated by the display frame processing is provided to the 3D display for displaying.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a first dielectric feature extending along a first direction, the first dielectric feature comprising a first dielectric layer having a first sidewall and a second sidewall opposing the first sidewall, a first semiconductor layer disposed adjacent the first sidewall, the first semiconductor layer extending along a second direction perpendicular to the first direction, a second dielectric feature extending along the first direction, the second dielectric feature disposed adjacent the first semiconductor layer, and a first gate electrode layer surrounding at least three surfaces of the first semiconductor layer, and a portion of the first gate electrode layer is exposed to a first air gap.

Abstract: Disclosed are an image display method and a 3d display system. The method is adapted to the 3d display system including a 3d display device and includes the following steps. A first image and a second image are obtained by splitting an input image according to a 3d image format. Whether the input image is a 3D format image complying with the 3D image format is determined through a stereo matching processing performed on the first image and the second image. An image interweaving process is enabled to be performed on the input image to generate an interweaving image in response to determining that the input image is the 3D format image complying with the 3D image format, and the interweaving image is displayed via the 3D display device.

Abstract: A lane change assistance method is provided. The method includes recognizing styles of two traffic lines corresponding to a lane where a vehicle is located. Whether the vehicle violates traffic rules is determined according to the styles of the two traffic lines when the vehicle is performing an operation of changing lanes. A prompt is issued when the vehicle violates traffic rules.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a plurality of first nanostructures formed over a substrate, and a dielectric wall adjacent to the first nanostructures. The semiconductor structure also includes a first liner layer between the first nanostructures and the dielectric wall, and the first liner layer is in direct contact with the dielectric wall. The semiconductor structure also includes a gate structure surrounding the first nanostructures, and the first liner layer is in direct contact with a portion of the gate structure.

Abstract: A semiconductor device according to the present disclosure includes a source feature and a drain feature, a plurality of semiconductor nanostructures extending between the source feature and the drain feature, a gate structure wrapping around each of the plurality of semiconductor nanostructures, a bottom dielectric layer over the gate structure and the drain feature, a backside power rail disposed over the bottom dielectric layer, and a backside source contact disposed between the source feature and the backside power rail. The backside source contact extends through the bottom dielectric layer.

Abstract: In some embodiments, the present disclosure relates to an integrated chip. The integrated chip includes a first channel structure configured to transport charge carriers within a first transistor device and a first gate electrode layer wrapping around the first channel structure. A second channel structure is configured to transport charge carriers within a second transistor device. A second gate electrode layer wraps around the second channel structure. The second gate electrode layer continuously extends from around the second channel structure to cover the first gate electrode layer. A third channel structure is configured to transport charge carriers within a third transistor device. A third gate electrode layer wraps around the third channel structure. The third gate electrode layer continuously extends from around the third channel structure to cover the second gate electrode layer.

Abstract: A pharmaceutical composition containing a mixed polymeric micelle and a drug enclosed in the micelle, in which the mixed polymeric micelle, 1 to 1000 nm in size, includes an amphiphilic block copolymer and a lipopolymer. Also disclosed are preparation of the pharmaceutical composition and use thereof for treating cancer.

Abstract: Trenches in which to form a back side isolation structure for an array of CMOS image sensors are formed by a cyclic process that allows the trenches to be kept narrow. Each cycle of the process includes etching to add a depth segment to the trenches and coating the depth segment with an etch-resistant coating. The following etch step will break through the etch-resistant coating at the bottom of the trench but the etch-resistant coating will remain in the upper part of the trench to limit lateral etching and substrate damage. The resulting trenches have a series of vertically spaced nodes. The process may result in a 10% increase in photodiode area and a 30-40% increase in full well capacity.

Abstract: An anti-peep light source module includes a light source module and a viewing angle switching module. The light source module has a light source and a light guide plate (LGP) and has light emitting elements arranged along a first direction. The viewing angle switching module is located on a transmission path of an illumination beam of the light source module and includes a viewing angle limiting element and a viewing angle adjusting element configured to change a viewing angle of the illumination beam. The viewing angle limiting element has a grating structure and is located between the viewing angle adjusting element and the light source module. an included angle between an extension direction of the grating structure and the first direction is within a range from 88 degrees to 92 degrees. The anti-peep light source module and A display device achieve favorable optical performance, user experience, and production yield.

Abstract: A semiconductor structure, comprising a redistribution layer (RDL) including a dielectric layer and a conductive trace within the dielectric layer; a first conductive member disposed over the RDL and electrically connected with the conductive trace; a second conductive member disposed over the RDL and electrically connected with the conductive trace; a first die disposed over the RDL; a second die disposed over the first die, the first conductive member and the second conductive member; and a connector disposed between the second die and the second conductive member to electrically connect the second die with the conductive trace, wherein the first conductive member is electrically isolated from the second die.

Abstract: A thermally conductive bracket is contemplated for use in a vehicle to facilitate transfer heat from a busbar to a cold plate, such as to assist with heat transfer to a cold plate used to act as a heat sink for a plurality of battery cells connected to the busbar. The bracket may include a thermally conductive heat transfer material shaped to receive the busbar where at least a portion of the material is configured to include opposed sides and a bottom such that the opposed sides are configured to transfer heat from the busbar to the bottom and the bottom is configured to transfer heat from the sides to the cold plate.

Abstract: A microscopic observation method configured to observe a specimen in a specimen carrier that includes the following steps: placing the specimen carrier at an observation point; obtaining a length of the specimen carrier along a movement direction, a thickness of the specimen carrier along an observation direction of a microscope objective, an observation angle of the microscope objective, and a relative distance between a lateral surface of the specimen carrier and the microscope objective along the movement direction; and adjusting an incident angle of a light beam emitted from a dark-field illumination towards the specimen carrier according to a calculation result of the length, the thickness, the observation angle, and the relative distance.

Abstract: An optical imaging lens includes, in order from an object side to an image side, an aperture, a first lens, a second lens, a third lens, a fourth lens and a fifth lens, wherein the first lens has positive refractive power and includes an object-side surface being convex; the second lens has negative refractive power and includes an object-side surface being concave; the third lens has positive refractive power and includes an object-side surface being convex and an image-side surface being convex; the fourth lens has positive refractive power and includes an object-side surface being concave and an image-side surface being convex; the fifth lens has negative refractive power and includes an object-side surface being concave. When specific conditions are satisfied, the optical imaging lens can have a compact size, high thermal endurance and good imaging qualities.

Abstract: A system for assessing risks of T2DM complications includes: a data acquisition module obtaining and inputting assessment parameters of a patient with T2DM into a risk assessment module; and the risk assessment module inputting the assessment parameters into a number of risk equations and using it to calculate risk values of the complication occurring after a period of time. The risk equation for all diabetic complications (i,j) is: ra(t,i,j)=1?exp{[H(t0)?H(t1)]Ca(t,i,j)} ra(t, i, j) is the risk value for the patient to develop the complication j from the current disease i at age t. t0 is an age of one patient at a state of the disease i. t1 is an age of the patient after the period of time. t is an age between t0 and t1. H(t0) and H(t1) are hazards of the complication occurring at the age t0 and the age t1, respectively.

Abstract: An optical imaging lens including an optical lens assembly with an optical axis, a lens barrel and a conductive element is disclosed. The optical lens assembly includes a plurality of lenses. The lens barrel includes an inner wall surface and a heating film, wherein the inner wall surface surrounds the optical axis and is made of electrical insulating material, and the heating film is formed on the inner wall surface. The optical lens assembly is disposed in the lens barrel in order from an object side to an image side. An edge of at least one lens of the optical lens assembly contacts the heating film. The conductive element is extended along the inner wall surface of the lens barrel, and is electrically connected to the heating film. One terminal of the conductive element is connected to an external power supply.