Abstract: An optical transceiver module temperature control device includes a processor, a printed circuit board assembly, an optical transceiver module and a temperature adjustment element. The processor is configured to measure an ambient temperature. The printed circuit board assembly includes a first side and a second side. The first side is opposite to the second side. The optical transceiver module is disposed on the first side of the printed circuit board assembly. The temperature adjustment element is coupled to the processor and disposed on the second side of the printed circuit board assembly. The processor is configured to generate a temperature adjustment signal according to the ambient temperature and an operating temperature range. The temperature adjustment element is configured to perform heat exchange with the printed circuit board assembly according to the temperature adjustment signal to adjust a temperature of the optical transceiver module into the operating temperature range.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes device fins formed on a substrate; fill fins formed on the substrate and disposed among the device fins; and gate stacks formed on the device fins and the fill fins. The fill fins include a first dielectric material layer and a second dielectric material layer deposited on the first dielectric material layer. The first and second dielectric material layers are different from each other in composition.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a source/drain feature on a semiconductor fin structure, a first isolation structure surrounding the semiconductor fin structure, source/drain spacers on the first isolation structure and surrounding a lower portion of the source/drain feature, a dielectric fin structure adjoining and in direct contact with the first isolation structure and one of the source/drain spacers, and an interlayer dielectric layer over the source/drain spacers and the dielectric fin structure and surrounding an upper portion of the source/drain feature.

Abstract: A mending method for a display includes the steps of making a display device light to make a plurality of light emitting positions thereof shine, searching out a plurality of defect positions among the light emitting positions, providing a transferring device having a transferring surface with a plurality of miniature light emitting elements positioned correspondingly to the light emitting positions, planning a mending procedure which includes in the area the transferring surface corresponds to, choosing in chief the largest number of defect positions able to be mended at a single time according to the positions of the miniature light emitting elements and then in the area the transferring surface corresponds to, planning the rest of the defect positions according to the rest of the miniature light emitting elements, and according to the mending procedure, moving the transferring device to weld the miniature light emitting elements at the defect positions.

Abstract: A semiconductor device includes a semiconductor fin, a gate structure, and a dielectric isolation plug. The semiconductor fin extends along a first direction above a substrate and includes a silicon germanium layer and a silicon layer over the silicon germanium layer. The gate structure extends across the semiconductor fin along a second direction perpendicular to the first direction. The dielectric isolation plug extends downwardly from a top surface of the silicon layer into the silicon germanium layer when viewed in a cross section taken along the first direction.

Abstract: A multi-gate semiconductor device is formed that provides a first fin element extending from a substrate. A gate structure extends over a channel region of the first fin element. The channel region of the first fin element includes a plurality of channel semiconductor layers each surrounded by a portion of the gate structure. A source/drain region of the first fin element is adjacent the gate structure. The source/drain region includes a first semiconductor layer, a dielectric layer over the first semiconductor layer, and a second semiconductor layer over the dielectric layer.

Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.

Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.

Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.

Abstract: Disclosed is a memory cell including a first transistor having a first terminal coupled to a bit line; a second transistor having a first terminal coupled to a bit line bar; a weight storage circuit coupled between a gate terminal of the first transistor and a gate terminal of the second transistor, storing a weight value, and determining to turn on the first transistor or the second transistor according to the weight value; and a driving circuit coupled to a second terminal of the first transistor, a second terminal of the second transistor, and at least one word line, receiving at least one threshold voltage and at least one input data from the word line, and determining whether to generate an operation current on a path of the turned-on first transistor or the turned-on second transistor according to the threshold voltage and the input data.

Abstract: A method of fabricating a semiconductor structure includes the following steps. A semiconductor wafer is provided. A plurality of first surface mount components and a plurality of second surface mount components are bonded onto the semiconductor wafer, wherein a first portion of each of the second surface mount components is overhanging a periphery of the semiconductor wafer. A first barrier structure is formed in between the second surface mount components and the semiconductor wafer. An underfill structure is formed under a second portion of each of the second surface mount components, wherein the first barrier structure blocks the spreading of the underfill structure from the second portion to the first portion.

Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.

Abstract: An aluminum battery packaging film includes a heat-sealing layer, wherein a material of the heat-sealing layer includes modified polyethylene terephthalate, polycarbonate, polyimide, or a combination thereof.

Abstract: An array substrate includes a substrate; a gate disposed on the substrate; a first insulating layer covering the gate; a first semiconductor layer and a second semiconductor layer that are provided on the first insulating layer, a channel corresponding to the gate being provided in the first semiconductor layer and second semiconductor layer, the second semiconductor layer including a first metal oxide semiconductor layer and a second metal oxide semiconductor layer which are stacked, both the first metal oxide semiconductor layer and the second metal oxide semiconductor layer being disconnected at the channel, and the oxygen vacancy concentration of the second metal oxide semiconductor layer being less than the oxygen vacancy concentration of the first metal oxide semiconductor layer; and a source and a drain that are provided on the second semiconductor layer, both the source and the drain being in electrically conductive contact with the second semiconductor layer.

Abstract: An aluminum battery packaging film includes a heat-sealing layer, wherein a material of the heat-sealing layer includes modified polyethylene terephthalate, polycarbonate, polyimide, or a combination thereof.

Abstract: An electrically connecting device includes an electrical connector and a mating connector detachably connected to the electrical connector. The electrical connector includes an insulating base, a central terminal, an outer terminal, and a magnetic member, which are fixed in the insulating base. The outer terminal includes an annular contact having a center located at the central terminal. The mating connector includes an insulating body, a first terminal, a second terminal, and a mating magnetic member, which are fixed in the insulating body. When the electrical connector and the mating connector are relatively rotated along the central terminal in 360 degrees, the magnetic member and the mating magnetic member are configured to attract with each other to form an annularly magnetic region, so that the central terminal and the annular contact are maintained to respectively contact with the first terminal and the second terminal.

Abstract: An electrical connector includes an insulation kit having an accommodating groove and a separation portion disposed in the accommodating groove, and the separation portion having a penetration hole penetrating the insulation kit; a conductive assembly sheathing the separation portion and disposed in the accommodating groove, and having a conductive kit and a conductive retainer and a flexible member disposed in the conductive kit; and an electrical conductive member disposed in the penetration hole of which one end is exposed outside one end of the conductive retainer. When a part of the conductive retainer which is exposed outside the conductive kit is electrically connected to another electrical connector, the conductive retainer is compressed to compress the flexible member to enable the flexible member to produce a restoring force, and then the conductive retainer is electrically connected to another electrical connector more stably through the restoring force.

Abstract: A connecting device includes a housing, connector module, and a cover. The housing has a first end and a second end, a container is disposed inside the housing, the inner wall of the housing is formed with a stop portion and a first buckle portion. The connector module includes a connector and a printed circuit board, the printed circuit board has a first surface and a second surface, the connector module is disposed in the container of the housing, and the second surface of the printed circuit board is abutted against a stop portion of the housing. A cover is disposed inside the container and near the first end, the cover has a first opening. An outer wall of the cover comprises a second buckle portion, and the second buckle portion is engaged with the first buckle portion, so the cover is fixed to the housing.

Abstract: A plug connector comprises a terminal module and a connecting module. The connecting module comprises a shelter having a bump arranged on an outer wall thereof, a fixing nut screwing on one end of the shelter, a socket holder having a ridge arranged on an inner wall thereof, and a spring. The terminal module is inserted into the shelter. The shelter is inserted into the socket holder, and the ridge is disposed between the bump and the fixing nut for enabling the socket holder to move relative to the shelter. The shelter, the fixing nut, and the socket holder define an accommodating space. The spring is arranged in the accommodating space, wherein two opposite ends of the spring are respectively abutted on the ridge and the fixing nut for providing an elastic force.

Abstract: A plug connector comprises a terminal module and a connecting module. The connecting module comprises a shelter having a bump arranged on an outer wall thereof, a fixing nut screwing on one end of the shelter, a socket holder having a ridge arranged on an inner wall thereof, and a spring. The terminal module is inserted into the shelter. The shelter is inserted into the socket holder, and the ridge is disposed between the bump and the fixing nut for enabling the socket holder to move relative to the shelter. The shelter, the fixing nut, and the socket holder define an accommodating space. The spring is arranged in the accommodating space, wherein two opposite ends of the spring are respectively abutted on the ridge and the fixing nut for providing an elastic force.