Patents by Inventor Chih-chi Chen
Chih-chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240136226Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Inventors: Li-Wei CHU, Ying-Chi SU, Yu-Kai CHEN, Wei-Yip LOH, Hung-Hsu CHEN, Chih-Wei CHANG, Ming-Hsing TSAI
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Patent number: 11966133Abstract: An electronic device is disclosed. The electronic device includes a substrate, a plurality of color filters disposed on the substrate, an optical film disposed on the plurality of color filter, and a defect disposed between the substrate and the optical film. The optical film has a first base, a protective layer on the first base, and a second base between the first base and the protective layer and having a first processed area. In a top view of the electronic device, the first processed area corresponds to the defect and at least partially overlaps at least two color filters.Type: GrantFiled: May 18, 2023Date of Patent: April 23, 2024Assignee: INNOLUX CORPORATIONInventors: Tai-Chi Pan, Chin-Lung Ting, I-Chang Liang, Chih-Chiang Chang Chien, Po-Wen Lin, Kuang-Ming Fan, Sheng-Nan Chen
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Patent number: 11955515Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.Type: GrantFiled: July 28, 2022Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin
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Publication number: 20240109988Abstract: The present invention provides phthalate free impact resistant polypropylene copolymer and methods of preparation, which are produced directly from the polymerization reactor system without further compounding of components which significantly alters the physical properties of the resulting polymer. The copolymer according to the present invention possesses both low temperature ductility and high flexural modulus, wherein said polymer is produced in the presence of a phthalate free ZN catalyst comprising urea component.Type: ApplicationFiled: September 12, 2022Publication date: April 4, 2024Inventors: Gapgoung Kong, Chih-Jian Chen, Min-Chi Hsieh, Lei Zhang, Cyrus C.Y. Lee
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Publication number: 20240111178Abstract: A contact lens comprises an optical zone and a peripheral zone. The optical zone is used for vision correction. The peripheral zone surrounds the optical zone. The optical zone and the peripheral zone jointly define a geometric center and a horizontal axis passing through the geometric center. Two stabilization zones symmetrically arranged relative to the geometric center are formed in the peripheral zone. These stabilization zones gradually thicken relative to a base curved surface of the peripheral zone.Type: ApplicationFiled: September 19, 2023Publication date: April 4, 2024Inventors: Chih-Cheng CHEN, Hsien Sheng LIAO, Wen Chi YANG
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Patent number: 11950016Abstract: The present invention provides a control method of a receiver. The control method includes the steps of: when the receiver enters a sleep/standby mode, continually detecting an auxiliary signal from an auxiliary channel to generate a detection result; and if the detection result indicates that the auxiliary signal has a preamble or a specific pattern, generating a wake-up control signal to wake up the receiver before successfully receiving the auxiliary signal having a wake-up command.Type: GrantFiled: April 15, 2020Date of Patent: April 2, 2024Assignee: MEDIATEK INC.Inventors: Chun-Chia Chen, Chih-Hung Pan, Chia-Chi Liu, Shun-Fang Liu, Meng-Kun Li, Chao-An Chen
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Patent number: 11948800Abstract: A device includes a pair of gate spacers on a substrate, and a gate structure on the substrate and between the gate spacers. The gate structure includes an interfacial layer, a metal oxide layer, a nitride-containing layer, a tungsten-containing layer, and a metal compound layer. The interfacial layer is over the substrate. The metal oxide layer is over the interfacial layer. The nitride-containing layer is over the metal oxide layer. The tungsten-containing layer is over the nitride-containing layer. The metal compound layer is over the tungsten-containing layer. The metal compound layer has a different material than a material of the tungsten-containing layer.Type: GrantFiled: December 14, 2022Date of Patent: April 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Yen-Yu Chen, Yu-Chi Lu, Chih-Pin Tsao, Shih-Hsun Chang
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Patent number: 11942420Abstract: A semiconductor device includes a first gate structure extending along a first lateral direction. The semiconductor device includes a first interconnect structure, disposed above the first gate structure, that extends along a second lateral direction perpendicular to the first lateral direction. The first interconnect structure includes a first portion and a second portion electrically isolated from each other by a first dielectric structure. The semiconductor device includes a second interconnect structure, disposed between the first gate structure and the first interconnect structure, that electrically couples the first gate structure to the first portion of the first interconnect structure. The second interconnect structure includes a recessed portion that is substantially aligned with the first gate structure and the dielectric structure along a vertical direction.Type: GrantFiled: June 8, 2022Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Guo-Huei Wu, Hui-Zhong Zhuang, Chih-Liang Chen, Cheng-Chi Chuang, Shang-Wen Chang, Yi-Hsun Chiu
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Patent number: 11942750Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.Type: GrantFiled: November 23, 2020Date of Patent: March 26, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yi-Chi Lee, Hsin-Chia Su, Shih-Ting Lin, Yu-Cheng Song, Fu-Shun Ho, Chih-Chun Chen
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Publication number: 20240096996Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.Type: ApplicationFiled: November 28, 2023Publication date: March 21, 2024Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
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Publication number: 20240087057Abstract: A power consumption monitoring device includes a sensor, a storage, and a processor. The sensor is configured to detect a power-consuming device quantity and a power consumption amount. The storage is configured to store the power-consuming device quantity and the power consumption amount. The processor is communicatively connected to the sensor and the storage. The processor is configured to calculate a power-consuming device idling indicator based on the power-consuming device quantity and the power consumption amount in a monitoring time interval, wherein the power-consuming device idling indicator is used for indicating a deviation status of the power-consuming device quantity and the power consumption amount. The processor is further configured to determine whether the power-consuming device idling indicator exceeds a warning threshold. In response to the power-consuming device idling indicator exceeding the warning threshold, the processor is further configured to generate a warning message.Type: ApplicationFiled: December 20, 2022Publication date: March 14, 2024Inventors: Wei-Chao CHEN, Ming-Chi CHANG, Chih-Pin WEI, Ke-Li WU, Hua-Hsiu CHIANG, Yu-Lun CHANG
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Publication number: 20240087951Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.Type: ApplicationFiled: November 17, 2023Publication date: March 14, 2024Inventors: Chun-Hao Kung, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
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Publication number: 20240086633Abstract: A method for generating and outputting a message is implemented using an electronic device the stores a computer program product and a text database. The text database includes a main message template, a template text that includes a placeholder, and a word group that includes a plurality of preset words for replacing the placeholder. The method includes: in response to receipt of a command for execution of the computer program product, displaying an editing interface including the main message template; in response to receipt of user operation of a selection of the main message template, displaying the template text; in response to receipt of user operation of a selection of one of the preset words via the user interface, generating an edited text by replacing the placeholder with the one of the preset words in the template text; and outputting the edited text as a message.Type: ApplicationFiled: April 25, 2023Publication date: March 14, 2024Inventors: Yi-Ru CHIU, Ting-Yi LI, Hong-Xun WANG, Jin-Lin CHEN, Chih-Hsuan YEH, Chia-Chi YIN, Wei-Ting LI, Po-Lun CHANG
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Publication number: 20240077593Abstract: An optical radar includes an optical-signal receiving unit and an optical-signal pickup unit. The optical-signal receiving unit is configured to receive a reflected light. The optical-signal pickup unit is coupled to the optical-signal receiving unit and includes a first optical-signal filtering circuit and a second optical-signal filtering unit. The first optical-signal filtering circuit is configured to filter out a first interference pulse of the reflected light, wherein the first interference pulse has a first interference voltage value higher than a reference voltage. The second optical-signal filtering circuit is coupled to the first optical-signal filtering circuit and configured to generate a clock signal comprising a clock pulse; and filter out a second interference pulse that does not match the clock pulse in time point from the reflected light.Type: ApplicationFiled: November 30, 2022Publication date: March 7, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chih-Chun CHEN, Yi-Chi LEE, Chia-Yu HU, Ji-Bin HORNG
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Patent number: 11923405Abstract: The present disclosure is directed to a semiconductor device. The semiconductor device includes a substrate, an insulating layer disposed on the substrate, a first conductive feature disposed in the insulating layer, and a capacitor structure disposed on the insulating layer. The capacitor structure includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode sequentially stacked. The semiconductor device also includes a first via connected to the first electrode and the third electrode, a second via connected to the second electrode, and a third via connected to the first conductive feature. A part of the first via is disposed in the insulating layer. A portion of the first conductive feature is directly under the capacitor structure.Type: GrantFiled: May 23, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
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Patent number: 11925017Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a stacked gate structure, and a wall structure. The stacked gate structure is on the substrate and extending along a first direction. The wall structure is on the substrate and laterally aside the stacked gate structure. The wall structure extends along the first direction and a second direction perpendicular to the first direction. The stacked gate structure is overlapped with the wall structure in the first direction and the second direction.Type: GrantFiled: January 13, 2020Date of Patent: March 5, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Hsuan Liu, Chiang-Ming Chuang, Chih-Ming Lee, Kun-Tsang Chuang, Hung-Che Liao, Chia-Ming Pan, Hsin-Chi Chen
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Publication number: 20240066635Abstract: A laser machining device includes a pulsed laser generator, an accommodation chamber, a bandwidth broadening unit and a pulse compression unit. The pulsed laser generator is configured to emit a pulsed laser. The accommodation chamber has a gas inlet. The bandwidth broadening unit is disposed in the accommodation chamber, and is configured to broaden a frequency bandwidth of the pulsed laser to obtain a broad bandwidth pulsed laser. The pulse compression unit is disposed in the accommodation chamber. The bandwidth broadening unit and the pulse compression unit are arranged in order along a laser propagation path, and the pulse compression unit is configured to compress a pulse duration of the broad bandwidth pulsed laser.Type: ApplicationFiled: October 5, 2022Publication date: February 29, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yi-Chi LEE, Bo-Han CHEN, Chih-Hsuan LU, Ping-Han WU, Zih-Yi LI, Shang-Yu HSU
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Publication number: 20240074037Abstract: A method of manufacturing an electronic device, including the following steps, is provided. A first dielectric layer and a second dielectric layer are provided. The first dielectric layer has a first surface and a second surface opposite to each other, and the second dielectric layer has a third surface and a fourth surface opposite to each other. A first unit is formed on the first surface or the second surface of the first dielectric layer. The first dielectric layer and the second dielectric layer are combined to form a substrate structure. The second surface of the first dielectric layer faces the third surface of the second dielectric layer. A dielectric loss of the first unit is less than a dielectric loss of the first dielectric layer. The method of manufacturing the electronic device of the embodiment of the disclosure can reduce the dielectric loss by using the unit.Type: ApplicationFiled: July 20, 2023Publication date: February 29, 2024Applicant: Innolux CorporationInventors: Yung-Chi Wang, Ying-Jen Chen, Chih-Yung Hsieh
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Patent number: 11915976Abstract: An ammonium fluoride gas may be used to form a protection layer for one or more interlayer dielectric layers, one or more insulating caps, and/or one or more source/drain regions of a semiconductor device during a pre-clean etch process. The protection layer can be formed through an oversupply of nitrogen trifluoride during the pre-clean etch process. The oversupply of nitrogen trifluoride causes an increased formation of ammonium fluoride, which coats the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) with a thick protection layer. The protection layer protects the interlayer dielectric layer(s), the insulating cap(s), and/or the source/drain region(s) during the pre-clean process from being etched by fluorine ions formed during the pre-clean process.Type: GrantFiled: June 27, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Wei Chu, Ying-Chi Su, Yu-Kai Chen, Wei-Yip Loh, Hung-Hsu Chen, Chih-Wei Chang, Ming-Hsing Tsai
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Patent number: 11915977Abstract: A stacked integrated circuit (IC) device and a method are disclosed. The stacked IC device includes a first semiconductor element. The first substrate includes a dielectric block in the first substrate; and a plurality of first conductive features formed in first inter-metal dielectric layers over the first substrate. The stacked IC device also includes a second semiconductor element bonded on the first semiconductor element. The second semiconductor element includes a second substrate and a plurality of second conductive features formed in second inter-metal dielectric layers over the second substrate. The stacked IC device also includes a conductive deep-interconnection-plug coupled between the first conductive features and the second conductive features. The conductive deep-interconnection-plug is isolated by dielectric block, the first inter-metal-dielectric layers and the second inter-metal-dielectric layers.Type: GrantFiled: April 12, 2021Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shu-Ting Tsai, Jeng-Shyan Lin, Dun-Nian Yaung, Jen-Cheng Liu, Feng-Chi Hung, Chih-Hui Huang, Sheng-Chau Chen, Shih Pei Chou, Chia-Chieh Lin