Patents by Inventor Chih-Chieh Chou
Chih-Chieh Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12197785Abstract: A controller integrated circuit (IC) and a method for controlling a storage device for a host device to enhance overall performance are provided. The host device may include the controller IC, where the storage device is positioned outside the host device. The controller IC may include a plurality of first queues, a first queue notification register and a first queue auxiliary notification register, where each first queue of the first queues is arranged to queue first queue entries for being used to interact with the storage device. The first queue notification register may store first queue notification information for indicating whether any first queue of the plurality of first queues sends any first interrupt. The first queue auxiliary notification register may store first queue auxiliary notification information for indicating which first queue of the plurality of first queues is the any first queue that has sent the any first interrupt.Type: GrantFiled: January 10, 2023Date of Patent: January 14, 2025Assignee: MEDIATEK INC.Inventors: Chin-Chin Cheng, Chih-Chieh Chou, Tzu-Shiun Liu
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Publication number: 20240427626Abstract: A system includes a host, a storage host controller, and a storage device. The host includes a hypervisor for running a first virtual machine and a second virtual machine. The storage host controller includes a plurality of first multi-circular queues (MCQs) assigned to the first virtual machine and a plurality of second MCQs assigned to the second virtual machine. The plurality of first MCQs assigned to the first virtual machine is used to control operations of the first virtual machine. The plurality of second MCQs assigned to the second virtual machine is used to control operations of the second virtual machine. The storage device has a first portion linked to the first virtual machine for being accessed by the first virtual machine, and a second portion linked to the second virtual machine for being accessed by the second virtual machine wherein the first portion and the second portion are isolated.Type: ApplicationFiled: June 25, 2024Publication date: December 26, 2024Applicant: MEDIATEK INC.Inventors: Liang-Yen Wang, Chih-Chieh Chou, Chin-Chin Cheng
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Patent number: 12175134Abstract: A host system operates to manage a storage device. The host system initiates an abort of a command when the command has been fetched from a submission queue (SQ) of the host system and the SQ entry has been fetched from the SQ and the host system has not received a corresponding command completion response from the storage device. The host system sends an abort request to the storage device, and issues a cleanup request to direct a host controller to reclaim host hardware resources allocated to the command. The host system adds a completion queue (CQ) entry to a CQ and sets an overall command status (OCS) value of the CQ entry to indicate completion of the abort request.Type: GrantFiled: February 22, 2024Date of Patent: December 24, 2024Assignee: MediaTek Inc.Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Chin Chin Cheng, Szu-Chi Liu
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Patent number: 12086463Abstract: A host system coupled to a storage system provides hardware support for command abort. The host system includes a host controller, which detects that a host driver has disabled an enable indicator of a submission queue (SQ). In response to the detection, the host controller stops further fetching from the SQ. The host controller sends all entries that have been fetched from the SQ to the storage device, and sets a status indicator of the SQ to indicate stopped fetching of the SQ.Type: GrantFiled: April 19, 2022Date of Patent: September 10, 2024Assignee: MediaTek Inc.Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Szu-Chi Liu, Chin Chin Cheng
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Publication number: 20240295990Abstract: A method for searching a buffer of a non-volatile storage host controller is provided. The method includes obtaining a command-based identifier of a command when a system level setting of a first format is enabled; and checking a format information on whether the first format or a second format is used to execute the command according to the identifier. A system for searching a buffer of a non-volatile storage host controller is provided. A host of the system searches a buffer by using the command-based identifier when a system level setting of a first format is enabled and check format information on whether the first format or a second format is used to execute the command according to the identifier.Type: ApplicationFiled: March 1, 2024Publication date: September 5, 2024Applicant: MEDIATEK INC.Inventors: Chih-Chieh Chou, Chin-Chin Cheng, Tzu-Shiun Liu
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Publication number: 20240231686Abstract: A controller integrated circuit (IC) and a method for controlling a storage device for a host device to enhance overall performance are provided. The host device may include the controller IC, where the storage device is positioned outside the host device. The controller IC may include a plurality of first queues, a first queue notification register and a first queue auxiliary notification register, where each first queue of the first queues is arranged to queue first queue entries for being used to interact with the storage device. The first queue notification register may store first queue notification information for indicating whether any first queue of the plurality of first queues sends any first interrupt. The first queue auxiliary notification register may store first queue auxiliary notification information for indicating which first queue of the plurality of first queues is the any first queue that has sent the any first interrupt.Type: ApplicationFiled: January 10, 2023Publication date: July 11, 2024Applicant: MEDIATEK INC.Inventors: Chin-Chin Cheng, Chih-Chieh Chou, Tzu-Shiun Liu
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Publication number: 20240192895Abstract: A host system operates to manage a storage device. The host system initiates an abort of a command when the command has been fetched from a submission queue (SQ) of the host system and the SQ entry has been fetched from the SQ and the host system has not received a corresponding command completion response from the storage device. The host system sends an abort request to the storage device, and issues a cleanup request to direct a host controller to reclaim host hardware resources allocated to the command. The host system adds a completion queue (CQ) entry to a CQ and sets an overall command status (OCS) value of the CQ entry to indicate completion of the abort request.Type: ApplicationFiled: February 22, 2024Publication date: June 13, 2024Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Chin Chin Cheng, Szu-Chi Liu
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Patent number: 11941298Abstract: A host system initiates an abort of a command that has been placed into a submission queue (SQ) of the host system. The host system identifies at least one of a first outcome and a second outcome. When the first outcome indicates that the command is not completed and the second outcome indicates that the SQ entry has been fetched from the SQ, the host system sends an abort request to a storage device, and issues a cleanup request to direct the host controller to reclaim host hardware resources allocated to the command. The host system adds a completion queue (CQ) entry to a CQ and sets an overall command status (OCS) value of the CQ entry based on at least one of the first outcome and the second outcome.Type: GrantFiled: April 19, 2022Date of Patent: March 26, 2024Assignee: MediaTek Inc.Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Chin Chin Cheng, Szu-Chi Liu
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Publication number: 20240045618Abstract: A host system is coupled to a storage device and manages completion queues (CQs) for the storage device. The host system includes a host controller and memory that stores submission queues (SQs) and the CQs. The host controller fetches a command from a given SQ that corresponds to a target CQ. The host controller saves the command in an SQ internal buffer of the host controller, calculates an available capacity (AC) associated with the given SQ for the host system to store a response to the command from the storage device, and sends the command to the storage device when the available capacity is non-zero. The available capacity is calculated based on, at least in part, available slots in the target CQ.Type: ApplicationFiled: May 24, 2023Publication date: February 8, 2024Inventors: Chin Chin Cheng, Chih-Chieh Chou, Tzu-Shiun Liu
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Publication number: 20220365724Abstract: A host system initiates an abort of a command that has been placed into a submission queue (SQ) of the host system. The host system identifies at least one of a first outcome and a second outcome. When the first outcome indicates that the command is not completed and the second outcome indicates that the SQ entry has been fetched from the SQ, the host system sends an abort request to a storage device, and issues a cleanup request to direct the host controller to reclaim host hardware resources allocated to the command. The host system adds a completion queue (CQ) entry to a CQ and sets an overall command status (OCS) value of the CQ entry based on at least one of the first outcome and the second outcome.Type: ApplicationFiled: April 19, 2022Publication date: November 17, 2022Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Chin Chin Cheng, Szu-Chi Liu
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Publication number: 20220350536Abstract: A host system coupled to a storage system provides hardware support for command abort. The host system includes a host controller, which detects that a host driver has disabled an enable indicator of a submission queue (SQ). In response to the detection, the host controller stops further fetching from the SQ. The host controller sends all entries that have been fetched from the SQ to the storage device, and sets a status indicator of the SQ to indicate stopped fetching of the SQ.Type: ApplicationFiled: April 19, 2022Publication date: November 3, 2022Inventors: Chih-Chieh Chou, Chia-Chun Wang, Liang-Yen Wang, Szu-Chi Liu, Chin Chin Cheng
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Patent number: 11474952Abstract: Methods, systems, and computer readable media for performing page fault handling are disclosed. According to one method, the method includes: after a translation lookaside buffer (TLB) miss associated with a virtual memory page occurs, identifying, in a page table, a page table entry (PTE) associated with the virtual memory page; determining, using a first indicator in the PTE, that the virtual memory page is not present in a main memory; determining, using a second indicator in the PTE, that the virtual memory page is associated with a valid memory address and that the virtual memory page is capable of using pre-allocated pages; obtaining, from a pre-allocation table, a page frame number associated with a pre-allocated page; and updating the PTE to indicate the page frame number.Type: GrantFiled: June 1, 2021Date of Patent: October 18, 2022Assignees: The Texas A&M University System, Hewlett Packard Enterprise Development LPInventors: Narasimha Reddy Annapareddy, Chih-Chieh Chou, Chandrahas Tirumulasetty, Paul Gratz, Ayman Abouelwafa
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Publication number: 20210374071Abstract: Methods, systems, and computer readable media for performing page fault handling are disclosed. According to one method, the method includes: after a translation lookaside buffer (TLB) miss associated with a virtual memory page occurs, identifying, in a page table, a page table entry (PTE) associated with the virtual memory page; determining, using a first indicator in the PTE, that the virtual memory page is not present in a main memory; determining, using a second indicator in the PTE, that the virtual memory page is associated with a valid memory address and that the virtual memory page is capable of using pre-allocated pages; obtaining, from a pre-allocation table, a page frame number associated with a pre-allocated page; and updating the PTE to indicate the page frame number.Type: ApplicationFiled: June 1, 2021Publication date: December 2, 2021Inventors: Narasimha Reddy Annapareddy, Chih-Chieh Chou, Chandrahas Tirumulasetty, Paul Gratz, Ayman Abouelwafa
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Publication number: 20180103127Abstract: A method of managing Universal Serial Bus (USB) data transmission and wireless communication of an electronic device is disclosed.Type: ApplicationFiled: December 11, 2017Publication date: April 12, 2018Inventors: Cheok Yan Goh, Yu-Hsun Chen, Chih-Chieh Chou, Horng-Bin Wang, Ching-Hwa Yu
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Publication number: 20170207060Abstract: A test structure for electron beam inspection and a method for defect determination using electron beam inspection are provided. The test structure for electron beam inspection includes a semiconductor substrate, at least two conductive regions disposed on the semiconductor substrate, a connection structure disposed on the two conductive regions, and a cap dielectric layer disposed on the connection structure. The method for defect determination using the electron beam inspection includes the following steps. An electron beam inspection is preformed to a test structure with an instant detector and a lock-in amplifier. Signals received by the detector within a period of time are amplified by the lock-in amplifier. A defect in the test structure is determined by monitoring the signals received by the detector and amplified by the lock-in amplifier. The inspection accuracy is improved by the test structure and the method for defect determination in the present invention.Type: ApplicationFiled: January 20, 2016Publication date: July 20, 2017Inventors: Kuan-Chun Lin, Chih-Chieh Chou, Shih-Cheng Chen, Chung-Chih Hung, Yung-Teng Tsai, Chi-Hung Chan
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Patent number: 9711326Abstract: A test structure for electron beam inspection and a method for defect determination using electron beam inspection are provided. The test structure for electron beam inspection includes a semiconductor substrate, at least two conductive regions disposed on the semiconductor substrate, a connection structure disposed on the two conductive regions, and a cap dielectric layer disposed on the connection structure. The method for defect determination using the electron beam inspection includes the following steps. An electron beam inspection is preformed to a test structure with an instant detector and a lock-in amplifier. Signals received by the detector within a period of time are amplified by the lock-in amplifier. A defect in the test structure is determined by monitoring the signals received by the detector and amplified by the lock-in amplifier. The inspection accuracy is improved by the test structure and the method for defect determination in the present invention.Type: GrantFiled: January 20, 2016Date of Patent: July 18, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Kuan-Chun Lin, Chih-Chieh Chou, Shih-Cheng Chen, Chung-Chih Hung, Yung-Teng Tsai, Chi-Hung Chan
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Patent number: 9632971Abstract: A method of handling transmission for a host in a data transmission system includes establishing a connection with a device of the data transmission system via a first frequency; receiving a negotiating information from the device; and re-establishing the connection with the device via a second frequency when the negotiating information reveals that the second frequency is available for the host to communicate with the device; wherein the second frequency is different than the first frequency.Type: GrantFiled: February 26, 2014Date of Patent: April 25, 2017Assignee: MEDIATEK INC.Inventors: Cheok Yan Goh, Yu-Hsun Chen, Mao-Lin Wu, Chih-Chieh Chou, Ching-Hwa Yu
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Publication number: 20140241406Abstract: A wireless communications system co-located with an interface apparatus includes a radio subsystem. The radio subsystem includes a transmission circuit arranged for performing a radio transmission, and a reception circuit arranged for performing a radio reception when the interface apparatus operates in a first operational state. The interface apparatus operates in one of a plurality of operational states including the first operational state and a second operational state, and a power consumption of the interface apparatus in the first operational state is lower than a power consumption of the interface apparatus in the second operational state.Type: ApplicationFiled: February 27, 2014Publication date: August 28, 2014Applicant: Mediatek Inc.Inventors: Ching-Hwa Yu, Cheok Yan Goh, Yu-Hsun Chen, Horng-Bin Wang, Mao-Lin Wu, Chih-Chieh Chou, Tsung-Yueh Hsieh, I-Lin Hsieh
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Publication number: 20140244872Abstract: A method of handling transmission for a host in a data transmission system includes establishing a connection with a device of the data transmission system via a first frequency; receiving a negotiating information from the device; and re-establishing the connection with the device via a second frequency when the negotiating information reveals that the second frequency is available for the host to communicate with the device; wherein the second frequency is different than the first frequency.Type: ApplicationFiled: February 26, 2014Publication date: August 28, 2014Applicant: Ralink Technology Corp.Inventors: Cheok Yan Goh, Yu-Hsun Chen, Mao-Lin Wu, Chih-Chieh Chou, Ching-Hwa Yu
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Publication number: 20140244852Abstract: A method of reducing mutual interference between Universal Serial Bus (USB) data transmission and wireless communication for an electronic device is disclosed. The method comprises establishing a plurality of physical layer links for the USB data transmission in a plurality of supported USB modes; dynamically selecting one of the supported USB modes according to the wireless communication; and performing the USB data transmission in the selected USB mode.Type: ApplicationFiled: February 26, 2014Publication date: August 28, 2014Applicant: Ralink Technology Corp.Inventors: Cheok Yan Goh, Yu-Hsun Chen, Chih-Chieh Chou, Horng-Bin Wang, Ching-Hwa Yu