Abstract: An embodiment of the invention provides a data transmission device. The data transmission device includes a first bus master control circuit, a second bus master control circuit, a storage circuit, a first control circuit and a second control circuit. The first bus master control circuit processes data transmissions associated with a peripheral device. The second bus master control circuit processes data transmissions associated with a system memory. The storage circuit stores information and instructions for data transmission. The first control circuit controls the first bus master control circuit according to the information and the instructions. The second control circuit controls the second bus master control circuit according to the information and the instructions.

Abstract: The invention provides a method for rapidly detecting a pathogen in animals or plants comprising using a specific primer set and nucleic acid in a sample to carry on a loop-mediated isothermal amplification. If at least one amplification occurs, the sample comprises the pathogen. The invention also provides a primer set, probe and kit for detecting a pathogen in animals or plants.

Abstract: The invention provides a method for rapidly detecting a pathogen in animals or plants comprising using a specific primer set and nucleic acid in a sample to carry on a loop-mediated isothermal amplification. If at least one amplification occurs, the sample comprises the pathogen. The invention also provides a primer set, probe and kit for detecting a pathogen in animals or plants.

Abstract: The speed of the network address translation translated with software is generally slower than the speed of transmitting packet in the network, so that the data stored in memory is affected. In this invention, the network address translation is translated by hardware, and a plurality of comparing engines is employed to accelerate the translating speed. Therefore, even in the worst case scenario, the time needed for translating the network address is shorter than the time needed for storing the packet into memory, so that the operation of the network address translation is assured not to affect the data transmission in the network.

Abstract: A method and an apparatus in a computer system for connecting buses with different clock frequencies are provided. The method comprises receiving a request transmitted from a master to a slave. If the clock frequency of the master is lower than that of the slave such that the slave sees more requests than the master does, redundant cycles of the request signal are masked lest the slave repeatedly receive the request. The request is then transferred to the slave. If the clock frequency of the master is higher than that of the slave such that the slave cannot receive the request in time, then the request signal is lengthened so that the request signal is synchronized with the clock cycles of the slave. The output data responded from the slave is then transferred to the master.

Abstract: A method and an apparatus in a computer system for connecting buses with different clock frequencies are provided. The method comprises receiving a request transmitted from a master to a slave. If the clock frequency of the master is lower than that of the slave such that the slave sees more requests than the master does, redundant cycles of the request signal are masked lest the slave repeatedly receive the request. The request is then transferred to the slave. If the clock frequency of the master is higher than that of the slave such that the slave cannot receive the request in time, then the request signal is lengthened so that the request signal is synchronized with the clock cycles of the slave. The output data responded from the slave is then transferred to the master.

Abstract: The speed of the network address translation translated with software is generally slower than the speed of transmitting packet in the network, so that the data stored in memory is affected. In this invention, the network address translation is translated by hardware, and a plurality of comparing engines is employed to accelerate the translating speed. Therefore, even in the worst case scenario, the time needed for translating the network address is shorter than the time needed for storing the packet into memory, so that the operation of the network address translation is assured not to affect the data transmission in the network.