Patents by Inventor Chih-Chieh Lan
Chih-Chieh Lan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7791080Abstract: A method of fabricating an image TFT array of a direct X-ray image sensor includes forming a first transparent conductive layer on a substrate; forming a gate line including a gate electrode, a common line, and a common electrode jutting out from the common line; forming an insulation layer; forming a semiconducting island on the insulation layer in the transistor region; forming a first via hole for the common electrode; forming a data line and a source electrode and a drain electrode; forming a passivation layer and a second via hole penetrating the passivation layer for the source electrode; forming a second transparent conductive layer as a top electrode. The insulation layer is formed on the first transparent conductive layer to serve as a dielectric layer of a capacitor before the TFT structure formed and can be formed at a relatively high temperature.Type: GrantFiled: October 14, 2008Date of Patent: September 7, 2010Assignee: HannStar Display Corp.Inventors: Chian-Chih Hsiao, Chih-Chieh Lan
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Patent number: 7746443Abstract: A method of utilizing dual-layer photoresist to form black matrixes and spacers on a control circuit substrate is provided. The dual-layer photoresist includes a layer of black resin and a layer of transparent photoresist. The black resin, having an optical density greater than three, is mainly used to achieve the effect of black matrix. The transparent photoresist is mainly used to satisfy the needed cell gap between two transparent substrates.Type: GrantFiled: October 24, 2005Date of Patent: June 29, 2010Assignee: HannStar Display CorporationInventors: Chih-Chieh Lan, Hung-Yi Hung, Yu-Fang Wang
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Patent number: 7633091Abstract: In the image TFT array structure, at least one first line, a lower electrode, a pad electrode, a common electrode and a first electrode connected with the first line are defined simultaneously by etching a first conductive layer. At least one second line intersecting the first line, an upper electrode corresponding to the lower electrode, a second electrode connected with the second line and a third electrode connected with the upper electrode are defined simultaneously by etching a second conductive layer applied to cover the substrate and above the first conductive layer. The lower electrode and the upper electrode of the storage capacitor have an approximately same large area.Type: GrantFiled: March 18, 2009Date of Patent: December 15, 2009Assignee: HannStar Display Corp.Inventor: Chih-Chieh Lan
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Publication number: 20090184320Abstract: In the image TFT array structure, at least one first line, a lower electrode, a pad electrode, a common electrode and a first electrode connected with the first line are defined simultaneously by etching a first conductive layer. At least one second line intersecting the first line, an upper electrode corresponding to the lower electrode, a second electrode connected with the second line and a third electrode connected with the upper electrode are defined simultaneously by etching a second conductive layer applied to cover the substrate and above the first conductive layer. The lower electrode and the upper electrode of the storage capacitor have an approximately same large area.Type: ApplicationFiled: March 18, 2009Publication date: July 23, 2009Inventor: Chih-Chieh Lan
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Patent number: 7524711Abstract: The present invention discloses a method of manufacturing an image TFT array and a structure thereof. A substrate is provided. At least one first line, a lower electrode, a pad electrode, a common electrode and a first electrode connected with the first line are defined simultaneously by etching a first conductive layer. At least one second line intersecting the first line, an upper electrode corresponding to the lower electrode, a second electrode connected with the second line and a third electrode connected with the upper electrode are defined simultaneously by etching a second conductive layer applied to cover the substrate and above the first conductive layer.Type: GrantFiled: October 20, 2005Date of Patent: April 28, 2009Assignee: HannStar Display Corp.Inventor: Chih-Chieh Lan
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Publication number: 20090032892Abstract: A method of fabricating an image TFT array of a direct X-ray image sensor includes forming a first transparent conductive layer on a substrate; forming a gate line including a gate electrode, a common line, and a common electrode jutting out from the common line; forming an insulation layer; forming a semiconducting island on the insulation layer in the transistor region; forming a first via hole for the common electrode; forming a data line and a source electrode and a drain electrode; forming a passivation layer and a second via hole penetrating the passivation layer for the source electrode; forming a second transparent conductive layer as a top electrode. The insulation layer is formed on the first transparent conductive layer to serve as a dielectric layer of a capacitor before the TFT structure formed and can be formed at a relatively high temperature.Type: ApplicationFiled: October 14, 2008Publication date: February 5, 2009Inventors: Chian-Chih Hsiao, Chih-Chieh Lan
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Patent number: 7452782Abstract: A method of fabricating an image TFT array of a direct X-ray image sensor includes forming a first transparent conductive layer on a substrate; forming a gate line including a gate electrode, a common line, and a common electrode jutting out from the common line; forming an insulation layer; forming a semiconducting island on the insulation layer in the transistor region; forming a first via hole for the common electrode; forming a data line and a source electrode and a drain electrode; forming a passivation layer and a second via hole penetrating the passivation layer for the source electrode; forming a second transparent conductive layer as a top electrode. The insulation layer is formed on the first transparent conductive layer to serve as a dielectric layer of a capacitor before the TFT structure formed and can be formed at a relatively high temperature.Type: GrantFiled: November 21, 2005Date of Patent: November 18, 2008Assignee: HannStar Display Corp.Inventors: Chian-Chih Hsiao, Chih-Chieh Lan
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Publication number: 20070114625Abstract: A method of fabricating an image TFT array of a direct X-ray image sensor includes forming a first transparent conductive layer on a substrate; forming a gate line including a gate electrode, a common line, and a common electrode jutting out from the common line; forming an insulation layer; forming a semiconducting island on the insulation layer in the transistor region; forming a first via hole for the common electrode; forming a data line and a source electrode and a drain electrode; forming a passivation layer and a second via hole penetrating the passivation layer for the source electrode; forming a second transparent conductive layer as a top electrode. The insulation layer is formed on the first transparent conductive layer to serve as a dielectric layer of a capacitor before the TFT structure formed and can be formed at a relatively high temperature.Type: ApplicationFiled: November 21, 2005Publication date: May 24, 2007Inventors: Chian-Chih Hsiao, Chih-Chieh Lan
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Publication number: 20070090364Abstract: The present invention discloses a method of manufacturing an image TFT array and a structure thereof. A substrate is provided. At least one first line, a lower electrode, a pad electrode, a common electrode and a first electrode connected with the first line are defined simultaneously by etching a first conductive layer. At least one second line intersecting the first line, an upper electrode corresponding to the lower electrode, a second electrode connected with the second line and a third electrode connected with the upper electrode are defined simultaneously by etching a second conductive layer applied to cover the substrate and above the first conductive layer.Type: ApplicationFiled: October 20, 2005Publication date: April 26, 2007Inventor: Chih-Chieh Lan
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Patent number: 7112512Abstract: On a substrate, the pattern of the first conductive layer is defined, that is, a gate line combination including gate pads, scanning lines and gate electrodes. A gate insulating layer, a semiconductor layer, a doped semiconductor layer and a second conductive layer are deposited on the substrate and the above-mentioned gate line combination in sequence. A photoresist layer is overlaid on the second conductive layer. The photoresist layer within the aperture areas is fully exposed. Using a half-tone mask or a slit pattern to make parts of the photoresist layer lying on the gate pads and the gate electrodes are not exposed to its full depth. As a result, the photoresist pattern formed varies in thickness. After being processed with drying etching and wet etching for several times, all the layers previously deposited within the aperture areas can be totally etched and removed.Type: GrantFiled: June 15, 2004Date of Patent: September 26, 2006Assignee: Hannstar Display CorporationInventors: Chih-Chieh Lan, Hung-Yi Hung
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Publication number: 20060033864Abstract: A method of utilizing dual-layer photoresist to form black matrixes and spacers on a control circuit substrate is provided. The dual-layer photoresist includes a layer of black resin and a layer of transparent photoresist. The black resin, having an optical density greater than three, is mainly used to achieve the effect of black matrix. The transparent photoresist is mainly used to satisfy the needed cell gap between two transparent substrates.Type: ApplicationFiled: October 24, 2005Publication date: February 16, 2006Applicant: HannStar Display CorporationInventors: Chih-Chieh Lan, Hung-Yi Hung, Yu-Fang Wang
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Publication number: 20060033863Abstract: A color liquid crystal display includes a control circuit located on a first transparent substrate. The control circuit includes control devices and a chessboard-like circuit with supporting areas. A passivation layer is located on the control circuit and has contact windows to expose electrodes of the control devices. A color filter layer is located on the passivation layer and pixel electrodes are located on the color filter layer. The pixel electrodes are electrically connected to the electrodes of the control devices through the contact windows. First photoresist layers are located on the supporting areas and the control devices, and second photoresist layers are located on the first photoresist layers. A common electrode is located on a surface of a second transparent substrate that faces the first transparent substrate. A liquid crystal layer is located between the first and the second transparent substrates.Type: ApplicationFiled: October 24, 2005Publication date: February 16, 2006Applicant: HannStar Display CorporationInventors: Chih-Chieh Lan, Hung-Yi Hung, Yu-Fang Wang
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Patent number: 6958792Abstract: A method of utilizing dual-layer photoresist to form black matrixes and spacers on a control circuit substrate is provided. The dual-layer photoresist is composed of a layer of black resin and a layer of transparent photoresist. The black resin, of which optical density is greater than three, is mainly used to achieve the effect of black matrix. The transparent photoresist is mainly used to satisfy the needed cell gap between two transparent substrates.Type: GrantFiled: June 10, 2003Date of Patent: October 25, 2005Assignee: Hannstar Display CorporationInventors: Chih-Chieh Lan, Hung-Yi Hung, Yu-Fang Wang
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Publication number: 20050157226Abstract: An integrated color filter comprising a glass substrate; an active matrix, including a plurality of switching elements, formed on the glass substrate; a plurality of color-filter units formed on the active matrix; a plurality of pixel electrodes formed on the color-filter units and electrically connected to the switching elements; and a transparent planarization layer formed on the pixel electrodes. Electrical testing can be performed immediately after completion of the pixel electrodes, such that, if defects are found, the panel can be first discarded, eliminating production time for a transparent planarization layer on the discarded panel and costs thereof.Type: ApplicationFiled: June 14, 2004Publication date: July 21, 2005Inventor: Chih-Chieh Lan
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Publication number: 20050112790Abstract: On a substrate, the pattern of the first conductive layer is defined, that is, a gate line combination including gate pads, scanning lines and gate electrodes. A gate insulating layer, a semiconductor layer, a doped semiconductor layer and a second conductive layer are deposited on the substrate and the above-mentioned gate line combination in sequence. A photoresist layer is overlaid on the second conductive layer. The photoresist layer within the aperture areas is fully exposed. Using a half-tone mask or a slit pattern to make parts of the photoresist layer lying on the gate pads and the gate electrodes are not exposed to its full depth. As a result, the photoresist pattern formed varies in thickness. After being processed with drying etching and wet etching for several times, all the layers previously deposited within the aperture areas can be totally etched and removed.Type: ApplicationFiled: June 15, 2004Publication date: May 26, 2005Inventors: Chih-Chieh Lan, Hung-Yi Hung
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Publication number: 20040100596Abstract: A method of utilizing dual-layer photoresist to form black matrixes and spacers on a control circuit substrate is provided. The dual-layer photoresist is composed of a layer of black resin and a layer of transparent photoresist. The black resin, of which optical density is greater than three, is mainly used to achieve the effect of black matrix. The transparent photoresist is mainly used to satisfy the needed cell gap between two transparent substrates.Type: ApplicationFiled: June 10, 2003Publication date: May 27, 2004Applicant: HANNSTAR DISPLAY CORPORATIONInventors: Chih-Chieh Lan, Hung-Yi Hung, Yu-Fang Wang