Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.

Abstract: The invention provides a semiconductor cleaning step, which comprises the following steps: providing a chamber with a bottom surface and a sidewall, the chamber contains a heater on the bottom surface, performing a first deposition step to leave a residual layer on the sidewall of the chamber, performing a carbon deposition step to form a carbon layer on at least the surface of the heater, and performing a plasma cleaning step to simultaneously remove the residual layer on the sidewall of the chamber and the carbon layer on the bottom surface.

Abstract: The present invention provides a circuitry including a regulator and a control circuit is disclosed. The regulator is configured to receive an input signal to generate an output voltage. The control circuit is configured to select one of a first reference voltage and a second reference voltage to serve as an output reference voltage according to an output signal of the regulator, and generate a control signal according to the output reference voltage to control a voltage level of the output voltage of the regulator.

Abstract: A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an dielectric layer. The first semiconductor package includes a plurality of first semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the first semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of first semiconductor chips, wherein the second semiconductor package includes a plurality of second semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of second semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of first semiconductor chips. The dielectric layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.

Abstract: Various embodiments include integrated circuit packages and methods of forming integrated circuit packages. In an embodiment, a device includes: a package substrate; an integrated circuit device attached to the package substrate; a stiffener ring around the integrated circuit device and attached to the package substrate; a lid attached to the stiffener ring; a channel connected to an area between the lid and the integrated circuit device, the channel extending along at least one side of the integrated circuit device in a top-down view; and a thermal interface material in the channel and in the area between the lid and the integrated circuit device.

Abstract: An extreme ultraviolet (EUV) mask includes a multilayer Mo/Si stack comprising alternating Mo and Si layers disposed over a first major surface of a mask substrate, a capping layer made of ruthenium (Ru) disposed over the multilayer Mo/Si stack, and an absorber layer on the capping layer. The EUV mask includes a circuit pattern area and a particle attractive area, and the capping layer is exposed at bottoms of patterns in the particle attractive area.

Abstract: An apparatus includes a lead frame, a dam and adhesive on portions of the lead frame, and an integrated circuit die having a portion on the dam and another portion on the adhesive. The lead frame can include two portions, or two lead frames. The dam can bridge a space between the two lead frames. The dam can be smaller than the integrated circuit die in at least a width dimension of the dam relative to a width dimension of the integrated circuit die, providing that the integrated circuit die overhangs the dam on each side of the width dimension of the dam. Adhesive is located between the integrated circuit die and each lead frame, adjacent to and on each side of the dam. The dam prevents adhesive from spreading into the space between the lead frames.

Abstract: A graphene liner deposited between at least one liner material (e.g., barrier layer, ruthenium liner, and/or cobalt liner) and a copper conductive structure reduces surface scattering at an interface between the at least one liner material and the copper conductive structure. Additionally, or alternatively, the carbon-based liner reduces contact resistance at an interface between the at least one liner material and the copper conductive structure. A carbon-based cap may additionally or alternatively be deposited on a metal cap, over the copper conductive structure, to reduce surface scattering at an interface between the metal cap and an additional copper conductive structure deposited over the metal cap.

Abstract: A semiconductor device includes a stack including a plurality of insulating layers and a plurality of word plane conductors alternately arranged, a vertical pillar structure disposed in the stack, and a plurality of outer electrodes. The vertical pillar structure includes a conductive core, an inner electrode on a sidewall of the conductive core, and an ovonic threshold switch (OTS) layer on a sidewall of the inner electrode, in which the inner electrode is disposed between the conductive core and the OTS layer. The outer electrodes are disposed between the OTS layer and the word plane conductors, wherein a resistance of a material of the word plane conductors is less than a resistance of a material of the outer electrodes. A method of forming the semiconductor device is also disclosed.

Abstract: A composite antenna and an electronic device are proposed. The electronic device includes the composite antenna, and the composite antenna includes a substrate, a first antenna structure, two contact springs, an antenna holder and a second antenna structure. The first antenna structure is disposed on the substrate, and two ends of the first antenna structure are coupled to a feeding point and a grounding point, respectively. The two contact springs are disposed on the first antenna structure, and electrically connected to the feeding point and the grounding point, respectively. The antenna holder is removably disposed on the substrate. The second antenna structure is disposed on the antenna holder and electrically connected to the two contact springs.

Abstract: A power device includes a substrate, an ion well in the substrate, a body region in the ion well, a source doped region in the body region, a drain doped region in the ion well, and gates on the substrate between the source doped region and the drain doped region. The gates include a first gate adjacent to the source doped region, a second gate adjacent to the drain doped region, and a stacked gate structure between the first gate and the second gate.

Abstract: A laser processing apparatus provides a laser unit, a vibration mirror module, a focusing module, and a processing platform. The laser unit emits a laser pulse beam. The vibration mirror module, positioned on the path of the laser pulse beam, reflects the laser pulse beam and has a first mode and a second mode configured to reflect the laser pulse beam into a first beam while the module is in the first mode or alternatively, into a second beam while the module is in the second mode. The first beam and the second beam travel in different directions. The focusing module receives the second beam reflected by the vibration mirror module in the second mode and focuses the second beam onto a focus. The processing platform is positioned at the focus to bear a to-be-processed device, upon which the second beam is cast.

Abstract: A method of controlling a wafer stage includes moving the wafer stage to position an immersion hood over a first sensor in the wafer stage. The method further includes moving the wafer stage to position the immersion hood over a second sensor in the wafer stage. The method further includes moving the wafer stage to position the immersion hood over a first particle capture area on the wafer stage after moving the wafer stage to position the immersion hood over the second sensor. The method further includes moving the wafer stage to define a routing track over the first particle capture area. The method further includes moving the wafer stage to position the immersion hood over an area for receiving a wafer on the wafer stage after defining the routing track over the first particle capture area.

Abstract: A method includes: positioning a wafer on an electrostatic chuck of a physical vapor deposition apparatus, the wafer including an opening exposing a conductive feature; setting a temperature of the wafer to a room temperature; forming a tungsten thin film in the opening by the physical vapor deposition apparatus, the tungsten thin film including a bottom portion that is on an upper surface of the conductive feature exposed by the opening, a top portion that is on an upper surface of a dielectric layer through which the opening extends and a sidewall portion that is on a sidewall of the dielectric layer exposed by the opening; removing the top portion and the sidewall portion of the tungsten thin film from over the opening; and forming a tungsten plug in the opening on the bottom portion by selectively depositing tungsten by a chemical vapor deposition operation.

Abstract: A semiconductor device and method of manufacture are provided which utilize an air gap to help isolate conductive structures within a dielectric layer. A first etch stop layer is deposited over the conductive structures, and the first etch stop layer is patterned to expose corner portions of the conductive structures. A portion of the dielectric layer is removed to form an opening. A second etch stop layer is deposited to line the opening, wherein the second etch stop layer forms a stepped structure over the corner portions of the conductive structures. Dielectric material is then deposited into the opening such that an air gap is formed to isolate the conductive structures.

Abstract: Embodiments are directed to a method for minimizing electrostatic charges in a semiconductor substrate. The method includes depositing photoresist on a semiconductor substrate to form a photoresist layer on the semiconductor substrate. The photoresist layer is exposed to radiation. The photoresist layer is developed using a developer solution. The semiconductor substrate is cleaned with a first cleaning liquid to wash the developer solution from the photoresist layer. A tetramethylammonium hydroxide (TMAH) solution is applied to the semiconductor substrate to reduce charges accumulated in the semiconductor substrate.

Abstract: A semiconductor device includes an insulating layer, wherein the insulating layer has a via opening and a conductive line opening. The semiconductor device further includes a via in the via opening. The semiconductor device further includes a conductive line in the conductive line opening. The conductive line includes a first liner layer, wherein a first thickness of the first liner layer over the via is less than a second thickness of the first liner layer over the insulating layer, and a conductive fill, wherein the first liner layer surrounds the conductive fill.

Abstract: An additive compound for dyeing an aluminum or aluminum alloy substrate after anodic oxidation to provide better uniformity in dyeing and hence a better finished appearance includes a main agent, an auxiliary agent, a pH stabilizer, an antibacterial agent, and a moderating agent. The antibacterial agent includes at least one of sorbic acid, fluconazole, itraconazole, artemisia argyi, benzyl alcohol, benzoic acid, salicylic acid, and boric acid. The moderating agent includes at least one of amino acid, amino salt, sulfate, nitrate, and chloride. An additive solution and a dyeing method are also provided, the use of the compound also allows for a more rapid dyeing process.

Abstract: An additive compound for dyeing an aluminum or aluminum alloy substrate after anodic oxidation to provide better uniformity in dyeing and hence a better finished appearance includes a main agent, an auxiliary agent, a pH stabilizer, and an antibacterial agent. The antibacterial agent includes at least one of sorbic acid, fluconazole, itraconazole, Artemisia argyi, benzyl alcohol, benzoic acid, salicylic acid, and boric acid. An additive solution and a dyeing method are also provided, the use of the compound also allows for a more rapid dyeing process.

Abstract: A package structure includes a circuit substrate, a package unit, a thermal interface material and a cover. The package unit is disposed on and electrically connected with the circuit substrate. The package unit includes a first surface facing the circuit substrate and a second surface opposite to the first surface. A underfill is disposed between the package unit and the circuit substrate, surrounding the package unit and partially covering sidewalls of the package unit. The cover is disposed over the package unit and over the circuit substrate. An adhesive is disposed on the circuit substrate and between the cover and the circuit substrate. The thermal interface material includes a metal-type thermal interface material and is disposed between the cover and the package unit. The thermal interface material physically contacts the second surface and the sidewalls of the package unit and physically contacts the underfill.