Abstract: The present invention provides a circuitry including a regulator and a control circuit is disclosed. The regulator is configured to receive an input signal to generate an output voltage. The control circuit is configured to select one of a first reference voltage and a second reference voltage to serve as an output reference voltage according to an output signal of the regulator, and generate a control signal according to the output reference voltage to control a voltage level of the output voltage of the regulator.

Abstract: The invention provides a semiconductor cleaning step, which comprises the following steps: providing a chamber with a bottom surface and a sidewall, the chamber contains a heater on the bottom surface, performing a first deposition step to leave a residual layer on the sidewall of the chamber, performing a carbon deposition step to form a carbon layer on at least the surface of the heater, and performing a plasma cleaning step to simultaneously remove the residual layer on the sidewall of the chamber and the carbon layer on the bottom surface.

Abstract: The present invention provides a circuitry including a regulator and a control circuit is disclosed. The regulator is configured to receive an input signal to generate an output voltage. The control circuit is configured to select one of a first reference voltage and a second reference voltage to serve as an output reference voltage according to an output signal of the regulator, and generate a control signal according to the output reference voltage to control a voltage level of the output voltage of the regulator.

Abstract: An automated information retrieval system includes a processor coupled to a communications interface and a non-transitory memory. The processor is configured to read instructions from the non-transitory memory to cause the system to perform operations comprising receiving a term including a plurality of words and generating a plurality of word vectors corresponding to the plurality of words respectively. A plurality of term vectors associated with the term is generated using the plurality of word vectors based on a plurality of term vector rules respectively. A combination term vector associated with the term is generated by combining the plurality of term vectors. One or more search results from a database for the term are provided using the combination term vector.

Abstract: The invention provides a semiconductor cleaning step, which comprises the following steps: providing a chamber with a bottom surface and a sidewall, the chamber contains a heater on the bottom surface, performing a first deposition step to leave a residual layer on the sidewall of the chamber, performing a carbon deposition step to form a carbon layer on at least the surface of the heater, and performing a plasma cleaning step to simultaneously remove the residual layer on the sidewall of the chamber and the carbon layer on the bottom surface.

Abstract: An automated information retrieval system includes a processor coupled to a communications interface and a non-transitory memory. The processor is configured to read instructions from the non-transitory memory to cause the system to perform operations comprising receiving a term including a plurality of words and generating a plurality of word vectors corresponding to the plurality of words respectively. A plurality of term vectors associated with the term is generated using the plurality of word vectors based on a plurality of term vector rules respectively. A combination term vector associated with the term is generated by combining the plurality of term vectors. One or more search results from a database for the term are provided using the combination term vector.

Abstract: Data stream based event sequence anomaly detection for mobility customer fraud analysis is presented herein. A system obtains a sequence of events comprising respective modalities of communication that correspond to a subscriber identity associated with a communication service—the sequence of events having occurred within a defined period. Based on defined classifiers representing respective fraudulent sequences of events, the system determines, via a group of machine learning models corresponding to respective machine learning processes, whether the sequence of events satisfies a defined condition with respect to likelihood of representing a fraudulent sequence of events of the respective fraudulent sequences of events. In response to the sequence of events being determined to satisfy the defined condition, the system sends, via a user interface of the system, a notification indicating that the sequence of events has been determined to represent the fraudulent sequence of events.

Abstract: An electronic system using a power regulator with reduced inrush current is shown. An output capacitance device that is coupled between the power regulator and the load has a first capacitor and a second capacitor. When the power regulator is in the first power mode, the first capacitor and the second capacitor are both coupled to the power regulator. When the power regulator is in the second power mode, which uses less power than the first power mode, the first capacitor is still coupled to the power regulator, but the second capacitor is disconnected from the power regulator and is protected from being discharged by the power regulator.

Abstract: The present disclosure provides a method of measuring a semiconductor device, including the following operations: obtaining a first image corresponding to a first layer in the semiconductor device; obtaining a second image corresponding to a second layer, below the first layer, in the semiconductor device, wherein the first layer includes at least one first structure and the second layer includes a plurality of second structures that are overlapped by the at least one first structure; generating a third image by combining the first image and the second image; and calculating an offset between the at least one first structure and the plurality of second structures based on the first image and the third image.

Abstract: A manufacturing method of a resistive memory device includes the following steps. A first electrode is formed. A first metal oxide layer is formed on the first electrode, and the first metal oxide layer includes first metal atoms. A multilayer insulator structure is formed on the first metal oxide layer. A second metal oxide layer is formed on the multilayer insulator structure. The second metal oxide layer includes second metal atoms, the multilayer insulator structure includes third metal atoms, and each of the third metal atoms is identical to each of the second metal atoms. A second electrode is formed on the second metal oxide layer. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in a vertical direction, and an atomic percent of the third metal atoms in the multilayer insulator structure changes in the vertical direction.

Abstract: The present invention provides a circuitry including a regulator and a control circuit is disclosed. The regulator is configured to receive an input signal to generate an output voltage. The control circuit is configured to select one of a first reference voltage and a second reference voltage to serve as an output reference voltage according to an output signal of the regulator, and generate a control signal according to the output reference voltage to control a voltage level of the output voltage of the regulator.

Abstract: The invention provides a deposition machine, which comprises a chamber, a first pipeline and a second pipeline, wherein one end of the first pipeline and one end of the second pipeline are connected to the chamber, and a part of the second pipeline passes through a sidewall of the first pipeline and extends into the interior of the first pipeline. The deposition machine has the advantages of reducing the risk of pipeline blockage.

Abstract: The present disclosure provides a method of measuring a semiconductor device, including the following operations: obtaining a first image corresponding to a first layer in the semiconductor device; obtaining a second image corresponding to a second layer, below the first layer, in the semiconductor device, wherein the first layer includes at least one first structure and the second layer includes a plurality of second structures that are overlapped by the at least one first structure; generating a third image by combining the first image and the second image; and calculating an offset between the at least one first structure and the plurality of second structures based on the first image and the third image.

Abstract: Data stream based event sequence anomaly detection for mobility customer fraud analysis is presented herein. A system obtains a sequence of events comprising respective modalities of communication that correspond to a subscriber identity associated with a communication service—the sequence of events having occurred within a defined period. Based on defined classifiers representing respective fraudulent sequences of events, the system determines, via a group of machine learning models corresponding to respective machine learning processes, whether the sequence of events satisfies a defined condition with respect to likelihood of representing a fraudulent sequence of events of the respective fraudulent sequences of events. In response to the sequence of events being determined to satisfy the defined condition, the system sends, via a user interface of the system, a notification indicating that the sequence of events has been determined to represent the fraudulent sequence of events.

Abstract: An automated information retrieval system includes a processor coupled to a communications interface and a non-transitory memory. The processor is configured to read instructions from the non-transitory memory to cause the system to perform operations comprising receiving a term including a plurality of words and generating a plurality of word vectors corresponding to the plurality of words respectively. A plurality of term vectors associated with the term is generated using the plurality of word vectors based on a plurality of term vector rules respectively. A combination term vector associated with the term is generated by combining the plurality of term vectors. One or more search results from a database for the term are provided using the combination term vector.

Abstract: An automated information retrieval system includes a processor coupled to a communications interface and a non-transitory memory. The processor is configured to read instructions from the non-transitory memory to cause the system to perform operations comprising receiving a term including a plurality of words and generating a plurality of word vectors corresponding to the plurality of words respectively. A plurality of term vectors associated with the term is generated using the plurality of word vectors based on a plurality of term vector rules respectively. A combination term vector associated with the term is generated by combining the plurality of term vectors. One or more search results from a database for the term are provided using the combination term vector.

Abstract: A resistive memory device includes a first electrode, a second electrode, a first metal oxide layer, a second metal oxide layer, and a multilayer insulator structure. The first metal oxide layer is disposed between the first electrode and the second electrode in a vertical direction. The second metal oxide layer is disposed between the first metal oxide layer and the second electrode in the vertical direction. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in the vertical direction. The first metal oxide layer includes first metal atoms, the second metal oxide layer includes second metal atoms, and the multilayer insulator structure includes third metal atoms. Each of the third metal atoms is identical to each of the second metal atoms, and an atomic percent of the third metal atoms in the multilayer insulator structure gradually changes in the vertical direction.

Abstract: A resistive memory device includes a first electrode, a second electrode, a first metal oxide layer, a second metal oxide layer, and a multilayer insulator structure. The first metal oxide layer is disposed between the first electrode and the second electrode in a vertical direction. The second metal oxide layer is disposed between the first metal oxide layer and the second electrode in the vertical direction. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in the vertical direction. The first metal oxide layer includes first metal atoms, the second metal oxide layer includes second metal atoms, and the multilayer insulator structure includes third metal atoms. Each of the third metal atoms is identical to each of the second metal atoms, and an atomic percent of the third metal atoms in the multilayer insulator structure gradually changes in the vertical direction.

Abstract: A resistive memory device includes a first electrode, a second electrode, a first metal oxide layer, a second metal oxide layer, and a multilayer insulator structure. The first metal oxide layer is disposed between the first electrode and the second electrode in a vertical direction. The second metal oxide layer is disposed between the first metal oxide layer and the second electrode in the vertical direction. The multilayer insulator structure is disposed between the first metal oxide layer and the second metal oxide layer in the vertical direction. The first metal oxide layer includes first metal atoms, the second metal oxide layer includes second metal atoms, and the multilayer insulator structure includes third metal atoms. Each of the third metal atoms is identical to each of the second metal atoms, and an atomic percent of the third metal atoms in the multilayer insulator structure gradually changes in the vertical direction.

Abstract: A charger circuit for use in controlling charge of a battery pack, which includes a charge control switch, a discharging circuit and a control unit. The charger circuit has at least one power output terminal and one connection terminal for coupling the battery pack. The charge control switch is arranged to selectively provide a power from a power source to the battery pack through the power output terminal. The discharging circuit is selectively coupled to the power output terminal, and arranged to discharge a battery cell of the battery pack when being coupled to the power output terminal. The control unit is coupled to the charge control switch and the discharging circuit, and determines whether to turn off the charge control switch and control the discharging circuit to couple to the power output terminal according to at least an over-voltage detection based on a signal based on the connection terminal.