Patents by Inventor Chih-Chien Pan
Chih-Chien Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220344304Abstract: A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an underfill layer. The first semiconductor package includes a plurality of lower semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the lower semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of lower semiconductor chips, wherein the second semiconductor package includes a plurality of upper semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of upper semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of lower semiconductor chips. The underfill layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.Type: ApplicationFiled: April 27, 2021Publication date: October 27, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chien Pan, Pu Wang, Li-Hui Cheng, An-Jhih Su, Szu-Wei Lu
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Patent number: 11456287Abstract: A package structure includes a circuit substrate, a semiconductor package, a lid structure, a passive device and a barrier structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The lid structure is disposed on the circuit substrate covering the semiconductor package. The lid structure is attached to the circuit substrate through an adhesive material. The passive device is disposed on the circuit substrate in between the semiconductor package and the lid structure. The barrier structure is separating the passive device from the lid structure and the adhesive material, and the barrier structure is in contact with the adhesive material.Type: GrantFiled: April 12, 2020Date of Patent: September 27, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsien-Pin Hu, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu, Wen-Hsin Wei, Chih-Chien Pan
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Patent number: 11424174Abstract: A method of forming a semiconductor device includes attaching a first semiconductor device to a first surface of a substrate; forming a sacrificial structure on the first surface of the substrate around the first semiconductor device, the sacrificial structure encircling a first region of the first surface of the substrate; and forming an underfill material in the first region.Type: GrantFiled: October 5, 2020Date of Patent: August 23, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Chien Pan, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu
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Publication number: 20220230985Abstract: A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate.Type: ApplicationFiled: January 15, 2021Publication date: July 21, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Chen, Chih-Chien Pan, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
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Publication number: 20220231005Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.Type: ApplicationFiled: April 10, 2022Publication date: July 21, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chien Pan, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu
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Publication number: 20220139802Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die group, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die group are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die group. The adhesive pattern at least overlay the underfill layer between the first die and the second die group. The TIM has a bottom surface being in direct contact with the first die, the second die group, and the adhesive pattern. The adhesive pattern separates the underfill layer from the TIM.Type: ApplicationFiled: January 21, 2022Publication date: May 5, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Chen, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu, Chih-Chien Pan
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Patent number: 11302683Abstract: A package structure and method of forming the same are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is laterally aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element insertion. The encapsulant laterally encapsulates the second die and the wall structure.Type: GrantFiled: April 1, 2020Date of Patent: April 12, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Chien Pan, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu
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Publication number: 20220037229Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die. The TIM is disposed on the first die, the second die, and the underfill layer. The adhesive pattern is disposed between the underfill layer and the TIM to separate the underfill layer from the TIM.Type: ApplicationFiled: July 28, 2020Publication date: February 3, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Hao Chen, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu, Chih-Chien Pan
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Patent number: 11239136Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first die, a second die, an interposer, an underfill layer, a thermal interface material (TIM), and an adhesive pattern. The first die and the second die are disposed side by side on the interposer. The underfill layer is disposed between the first die and the second die. The TIM is disposed on the first die, the second die, and the underfill layer. The adhesive pattern is disposed between the underfill layer and the TIM to separate the underfill layer from the TIM.Type: GrantFiled: July 28, 2020Date of Patent: February 1, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Chen, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu, Chih-Chien Pan
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Patent number: 11205612Abstract: In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.Type: GrantFiled: December 9, 2019Date of Patent: December 21, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chien Pan, Li-Hui Cheng, Chin-Fu Kao, Szu-Wei Lu
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Publication number: 20210343611Abstract: A method for forming a package structure is provided. The method for forming a package structure includes bonding a package component to a first surface of a substrate through a plurality of first connectors. The package component includes a first semiconductor die and a second semiconductor die. The method also includes forming a dam structure over the first surface of the substrate. The dam structure is around and separated from the package component, and a top surface of the dam structure is higher than a top surface of the package component. The method further includes forming an underfill layer between the dam structure and the package component. In addition, the method includes removing the dam structure after the underfill layer is formed.Type: ApplicationFiled: July 12, 2021Publication date: November 4, 2021Inventors: Chih-Hao CHEN, Chih-Chien PAN, Li-Hui CHENG, Chin-Fu KAO, Szu-Wei LU
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Publication number: 20210313304Abstract: A package structure and method of forming the same are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is laterally aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element insertion. The encapsulant laterally encapsulates the second die and the wall structure.Type: ApplicationFiled: April 1, 2020Publication date: October 7, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Chien Pan, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu
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Patent number: 11121051Abstract: Semiconductor packages and methods of forming the same are disclosed. a semiconductor package includes a die and an underfill. The die is disposed over a surface and includes a first sidewall. The underfill encapsulates the die. The underfill includes a first underfill fillet on the first sidewall, and in a cross-sectional view, a second sidewall of the first underfill fillet has a turning point.Type: GrantFiled: October 16, 2019Date of Patent: September 14, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Li-Hui Cheng, Chin-Fu Kao, Szu-Wei Lu, Chih-Chien Pan
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Publication number: 20210249343Abstract: In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.Type: ApplicationFiled: April 29, 2021Publication date: August 12, 2021Inventors: Chih-Chien Pan, Li-Hui Cheng, Chin-Fu Kao, Szu-Wei Lu
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Patent number: 11062968Abstract: A method for forming a package structure is provided. The method for forming a package structure includes bonding a package component to a first surface of a substrate through a plurality of first connectors. The package component includes an interposer, a first semiconductor die and a second semiconductor die over the interposer. The method for forming a package structure also includes forming a dam structure over the first surface of the substrate. The dam structure is around and separated from the package component. The method for forming a package structure further includes forming an underfill layer between the dam structure and the package component, and removing the dam structure after the underfill layer is formed.Type: GrantFiled: August 22, 2019Date of Patent: July 13, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Hao Chen, Chih-Chien Pan, Li-Hui Cheng, Chin-Fu Kao, Szu-Wei Lu
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Publication number: 20210118758Abstract: Semiconductor packages and methods of forming the same are disclosed. a semiconductor package includes a die and an underfill. The die is disposed over a surface and includes a first sidewall. The underfill encapsulates the die. The underfill includes a first underfill fillet on the first sidewall, and in a cross-sectional view, a second sidewall of the first underfill fillet has a turning point.Type: ApplicationFiled: October 16, 2019Publication date: April 22, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Li-Hui Cheng, Chin-Fu Kao, Szu-Wei Lu, Chih-Chien Pan
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Publication number: 20210066151Abstract: A package structure includes a circuit substrate, a semiconductor package, a lid structure, a passive device and a barrier structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The lid structure is disposed on the circuit substrate covering the semiconductor package. The lid structure is attached to the circuit substrate through an adhesive material. The passive device is disposed on the circuit substrate in between the semiconductor package and the lid structure. The barrier structure is separating the passive device from the lid structure and the adhesive material, and the barrier structure is in contact with the adhesive material.Type: ApplicationFiled: April 12, 2020Publication date: March 4, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsien-Pin Hu, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu, Wen-Hsin Wei, Chih-Chien Pan
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Publication number: 20210057297Abstract: A method for forming a package structure is provided. The method for forming a package structure includes bonding a package component to a first surface of a substrate through a plurality of first connectors. The package component includes an interposer, a first semiconductor die and a second semiconductor die over the interposer. The method for forming a package structure also includes forming a dam structure over the first surface of the substrate. The dam structure is around and separated from the package component. The method for forming a package structure further includes forming an underfill layer between the dam structure and the package component, and removing the dam structure after the underfill layer is formed.Type: ApplicationFiled: August 22, 2019Publication date: February 25, 2021Inventors: Chih-Hao CHEN, Chih-Chien PAN, Li-Hui CHENG, Chin-Fu KAO, Szu-Wei LU
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Publication number: 20210020534Abstract: A method of forming a semiconductor device includes attaching a first semiconductor device to a first surface of a substrate; forming a sacrificial structure on the first surface of the substrate around the first semiconductor device, the sacrificial structure encircling a first region of the first surface of the substrate; and forming an underfill material in the first region.Type: ApplicationFiled: October 5, 2020Publication date: January 21, 2021Inventors: Chih-Chien Pan, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu
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Patent number: 10796976Abstract: A method of forming a semiconductor device includes attaching a first semiconductor device to a first surface of a substrate; forming a sacrificial structure on the first surface of the substrate around the first semiconductor device, the sacrificial structure encircling a first region of the first surface of the substrate; and forming an underfill material in the first region.Type: GrantFiled: October 31, 2018Date of Patent: October 6, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chien Pan, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu