Abstract: An integrated system of a melting device and a liquid injection mechanism and an injection method thereof, including: a machine platform, an injection device, a melting cylinder, a mold device and a driving device; wherein the melting cylinder is installed above the injection device, the lower part of the front end of the melting cylinder is connected to the input end of the injection device, and there is an upright holding furnace above the rear end; where an alloy melting furnace melts materials into alloy molten liquid, which flows through an input pipe into the holding furnace and into the melting cylinder. Through a heater, the alloy molten liquid is kept warm and flows into the injection device, where it is extruded from the front end of the injection device by the driving device, entering the mold device for cooling and molding to complete the alloy injection molding.

Abstract: A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.

Abstract: A casing structure with functionality of effective thermal management is disclosed, which consists of a casing member, a low thermal conductivity medium, a second heat spreader, and a first heat spreader. When a user operates the electronic device, heat generated from CPU and/or GPU is transferred to the second heat spreader via the first heat spreader, and then is two-dimensionally spread in the second heat spreader. Consequently, the heat is dissipated away from the casing member to air due to the outstanding thermal radiation ability of the casing member. The low thermal conductivity medium is adopted for controlling a heat transfer of heat transferring paths from the heat source and ends to the casing member. By applying the casing structure in an electronic device by a form of a top casing and/or a back casing, an outer surface temperature of the casing member can be well controlled.

Abstract: A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.

Abstract: A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.

Abstract: A casing structure with functionality of effective thermal management is disclosed, which consists of a casing member, a low thermal conductivity medium, a second heat spreader, and a first heat spreader. When a user operates the electronic device, heat generated from CPU and/or GPU is transferred to the second heat spreader via the first heat spreader, and then is two-dimensionally spread in the second heat spreader. Consequently, the heat is dissipated away from the casing member to air due to the outstanding thermal radiation ability of the casing member. The low thermal conductivity medium is adopted for controlling a heat transfer of heat transferring paths from the heat source and ends to the casing member. By applying the casing structure in an electronic device by a form of a top casing and/or a back casing, an outer surface temperature of the casing member can be well controlled.

Abstract: The present invention provides a circuitry within a router or a switch, wherein the circuitry comprises a priority decision circuitry and a per-stream filtering and policing circuitry. The priority decision circuitry is configured to determine a priority of a frame received from a port of the router or the switch. The per-stream filtering and policing circuitry is configured to classify the frame into a first-type frame, a second-type frame or a third-type frame, wherein if the frame is determined as the first-type frame, the per-stream filtering and policing circuitry forwards the frame; if the frame is determined as the third-type frame, the per-stream filtering and policing circuitry discards the frame; and if the frame is determined as the second-type frame, the per-stream filtering and policing circuitry changes the priority of the frame, and the per-stream filtering and policing circuitry forwards the frame with the changed priority.

Abstract: The present disclosure pertains to an electromagnetic-wave shielding film and a preparation method thereof. The electromagnetic-wave shielding film includes a first metal layer, an insulating layer, and a second metal layer. The first metal layer has two opposite surfaces. The insulating layer is disposed on one of the surfaces of the first metal layer. The second metal layer is disposed on the other surface of the first metal layer and contains nano metal particles and an binder. The electromagnetic-wave shielding film can be used in a printed circuit board, and shows a satisfactory electromagnetic wave shielding effect.

Abstract: A semiconductor package including at least one functional die; at least one dummy die free of active circuit, wherein the dummy die comprises at least one metal-insulator-metal (MIM) capacitor; and a redistribution layer (RDL) structure interconnecting the MIM capacitor to the at least one functional die.

Abstract: The present disclosure pertains to an electromagnetic-wave shielding film and a preparation method thereof. The electromagnetic-wave shielding film includes a first metal layer, an insulating layer, and a second metal layer. The first metal layer has two opposite surfaces. The insulating layer is disposed on one of the surfaces of the first metal layer. The second metal layer is disposed on the other surface of the first metal layer and contains nano metal particles and an binder. The electromagnetic-wave shielding film can be used in a printed circuit board, and shows a satisfactory electromagnetic wave shielding effect.

Abstract: A depth processing method and associated graphic processing circuit is provided. The method comprises loading geometry data of a scene and performing a vertex transformation thereof. After the geometry data is segmented in a tile resolution, pre-depth data of the scene are obtained. After the geometry data are segmented in a bin resolution, plural bin tables are generated. Then, the plural bin tables are converted into plural tiles, the plural converted tiles are classified into a first portion of tiles and a second portion of tiles according to depth data of the converted tiles and the pre-depth data of the scene, and the second portion of tiles are discarded. After the first portion of tiles are processed, a color value and a depth value of each pixel of the scene are generated.

Abstract: A method for calculating a feed forward equalizer coefficient of a feed forward equalizer in a minimum mean square error decision feedback equalizer (MMSE-DFE) based on a fast transversal recursive least squares (FT-RLS) algorithm is provided. The length of the feed-forward equalizer is LF, which is a positive integer. The method includes an outer iteration having an LF number of iterations. The outer iteration includes an inner iteration having an n number of iterations, where n is an integer between 0 and (LF?2).

Abstract: A depth processing method and associated graphic processing circuit is provided. The method comprises loading geometry data of a scene and performing a vertex transformation thereof. After the geometry data is segmented in a tile resolution, pre-depth data of the scene are obtained. After the geometry data are segmented in a bin resolution, plural bin tables are generated. Then, the plural bin tables are converted into plural tiles, the plural converted tiles are classified into a first portion of tiles and a second portion of tiles according to depth data of the converted tiles and the pre-depth data of the scene, and the second portion of tiles are discarded. After the first portion of tiles are processed, a color value and a depth value of each pixel of the scene are generated.

Abstract: A graphic processing circuit with binning rendering and associated pre-depth processing method is provided. Firstly, a first depth data of a first primitive corresponding to a specified tile is received. Then, the pre-depth data corresponding to the specified tile is read from a pre-Z buffer. If the first depth data is not larger than the pre-depth data and the first primitive is an opaque primitive, the pre-depth data is updated with the first depth data. If the first depth data is not larger than the pre-depth data and the first primitive is a translucent primitive, an uncertainty ordering range is defined according to the first depth data and the pre-depth data, and the pre-depth data is updated with the uncertainty ordering range.

Abstract: A graphic processing circuit with binning rendering and associated pre-depth processing method is provided. Firstly, a first depth data of a first primitive corresponding to a specified tile is received. Then, the pre-depth data corresponding to the specified tile is read from a pre-Z buffer. If the first depth data is not larger than the pre-depth data and the first primitive is an opaque primitive, the pre-depth data is updated with the first depth data. If the first depth data is not larger than the pre-depth data and the first primitive is a translucent primitive, an uncertainty ordering range is defined according to the first depth data and the pre-depth data, and the pre-depth data is updated with the uncertainty ordering range.

Abstract: A method for refining oil includes contacting an oil with hydrogen to perform a hydrodeoxygenation reaction using iron oxide as a catalyst. The iron oxide comprises ferrous oxide (FeO), ferrum dioxide (FeO2), ferric oxide (Fe2O3), ferroferric oxide (Fe3O4), or combinations thereof.

Abstract: The present disclosure includes systems and techniques relating to controlling memory devices with a generic command descriptor. In some implementations, an apparatus, systems, or methods can include a memory controller including an interface configured to connect with a NAND memory device and circuitry configured to receive a descriptor of a command sequence including multiple segments for managing the NAND memory device. The descriptor can include option information corresponding to each segment of the command sequence. The circuitry can also be configured to generate the command sequence for managing the NAND memory device based, at least in part, on the option information of the descriptor.

Abstract: Apparatus for programming a non-volatile memory, the apparatus having corresponding methods and tangible computer-readable media, comprise: a command memory configured to hold a plurality of command templates, wherein each of the command templates specifies a sequence of pad signals; a state machine configured to i) receive descriptors, wherein each of the descriptors includes a pointer to a respective one of the command templates in the command memory, and ii) generate the sequence of pad signals based on the command template indicated by the respective pointer; and a non-volatile memory interface configured to provide, to pads of the non-volatile memory, the sequence of pad signals generated by the state machine.

Abstract: The present disclosure includes systems and techniques relating to management of bit line errors based on a stored set of data. In some implementations, a system can include a device including non-volatile solid state memory and a memory controller. The memory controller can be configured to identify, from the solid state memory of the device, one or more bit line errors for the device upon power up of the system, construct a set of data corresponding to the one or more bit line errors for the device, store the set of data, at least in part, in the device, and, upon a subsequent power up of the system, identify the one or more bit line errors for the device from the stored set of data.

Abstract: In accordance with an embodiment of the disclosure, systems and methods are provided for reducing an amount of peak power consumption in a device. In certain implementations, a first signal and a second signal are received, wherein the first signal and the second signal are indicative of amounts of power consumption in a device. The first signal is combined with the second signal to generate a combined signal, and at least a portion of the second signal is shifted in time to cause a combination of the first signal and the shifted portion to have a peak amplitude less than a peak amplitude of the combined signal.