Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: There is provided a human interface device including a control chip and a plurality of control components. The control chip includes a voltage detection circuit coupled to the plurality of control components via a multiplexing pin and detects a voltage value on the multiplexing pin through the voltage detection circuit thereby identifying an operating state of the plurality of control components.

Abstract: There is provided a mouse device including a control chip and at least one control component. The control chip includes a voltage detection circuit coupled to the at least one control component through at least one multiplexing pin and detects at least one voltage value on the at least one multiplexing pin using the voltage detection circuit thereby identifying an operating state of the at least one control component.

Abstract: There is provided a mouse device including a control chip and at least one control component. The control chip includes a voltage detection circuit coupled to the at least one control component through at least one multiplexing pin and detects at least one voltage value on the at least one multiplexing pin using the voltage detection circuit thereby identifying an operating state of the at least one control component.

Abstract: There is provided a human interface device including a control chip and a plurality of control components. The control chip includes a voltage detection circuit coupled to the plurality of control components via a multiplexing pin and detects a voltage value on the multiplexing pin through the voltage detection circuit thereby identifying an operating state of the plurality of control components.

Abstract: A power switching device including a rectifier circuit and a control circuit is provided. A first terminal of the rectifier circuit receives an external voltage source and a second terminal of the rectifier circuit is electrically connected to a node. The control circuit is electrically connected between the node and a battery. Furthermore, during a power supply mode, the control circuit provides a power supply path, so that the battery provides a battery current to the node. Besides, the control circuit detects the battery current and determines whether or not to switch to a normal mode from the power supply mode according to the detection result.

Abstract: A driving system of a display panel has a code identification device and several source drivers. The code identification device provides driving-capacity information of the display panel. The source drivers drive the display panel according to the driving-capacity information.

Abstract: A decoder of a digital-to-analog converter is disclosed. In the present invention, the gamma voltage selection is controlled by a reduced number of NMOS and PMOS transistors according to the characteristic of the NMOS and PMOS transistor, such that the layout area of the switch array is reduced. Moreover, a N-type buried diffusion (BDN) layer and a P-type buried diffusion (BDP) layer are adopted to replace the contacts in the layout of conventional decoder, such that the layout can be simplified and the bump pad pitch thereof can be decreased.

Abstract: A terminal seat comprises a first receiving portion, a second receiving portion and a joint portion formed between the two. The second receiving portion corresponds to the first receiving portion and has similar shapes. The joint portion formed between the first receiving portion and the second receiving portion has a smaller lateral cross-section and a smaller lengthwise cross-section than the first receiving portion and the second receiving portion so as to form an annular groove. A plurality of terminal seats can be assembled together by a fixing member. The fixing member crosses the annular groove and fastens the assembly of the plurality of terminal seats.

Abstract: A terminal seat comprises a first receiving portion, a second receiving portion and a joint portion formed between the two. The second receiving portion corresponds to the first receiving portion and has similar shapes. The joint portion formed between the first receiving portion and the second receiving portion has a smaller lateral cross-section and a smaller lengthwise cross-section than the first receiving portion and the second receiving portion so as to form an annular groove. A plurality of terminal seats can be assembled together by a fixing member. The fixing member crosses the annular groove and fastens the assembly of the plurality of terminal seats.