Patents by Inventor Chih Fan
Chih Fan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240130080Abstract: An immersion cooling system is provided. It includes a pressure seal tank, an electronic module, a blower, and a distributor plate. The pressure seal tank contains a cooling liquid, and a gas outlet is disposed on the top or a sidewall of the pressure seal tank, a gas inlet is disposed on the bottom of the pressure seal tank. The gas outlet is higher than the liquid level of the cooling liquid. The electronic module is disposed in the pressure seal tank and immersed in the cooling liquid. The blower is communicated with the pressure seal tank and configured to extract the gas from the gas outlet and inject the gas into the pressure seal tank via the gas inlet. The distributor plate is disposed in the pressure seal tank and located between the electronic module and the gas inlet.Type: ApplicationFiled: July 12, 2023Publication date: April 18, 2024Inventors: Ren-Chun CHANG, Wei-Chih LIN, Zih-Yang FAN
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Publication number: 20240114846Abstract: A light-emitting diode for plant illumination is provided. The light-emitting diode has a multiple quantum well structure for generating a light beam with a broadband blue-violet light spectrum. The broadband blue-violet light spectrum has a first peak and a second peak within a range from 410 nm to 450 nm, a wavelength value of the second peak is greater than a wavelength value of the first peak, and a difference between the wavelength value of the second peak and the wavelength value of the first peak ranges from 5 nm to 30 nm. The broadband blue-violet light spectrum generated by the light-emitting diode can better match a photosynthetic action spectrum of plants.Type: ApplicationFiled: August 28, 2023Publication date: April 11, 2024Inventors: BEN-JIE FAN, HUNG-CHIH YANG, SHUEN-TA TENG
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Publication number: 20240105749Abstract: An image sensor structure including a substrate, a pixel structure, and a deep trench isolation (DTI) structure is provided. The substrate includes a first side and a second side opposite to each other. The pixel structure includes a transfer transistor, a light sensing device, and a floating diffusion region. The transfer transistor includes a first gate. The first gate is disposed on the first side of the substrate. The light sensing device is disposed in the substrate and is located on one side of the first gate. The floating diffusion region is disposed in the substrate and is located on another side of the first gate. The DTI structure extends into the substrate from the second side of the substrate. The top-view pattern of the floating diffusion region does not overlap the top-view pattern of the DTI structure.Type: ApplicationFiled: October 26, 2022Publication date: March 28, 2024Applicant: Powerchip Semiconductor Manufacturing CorporationInventors: Shih-Ping Lee, Chih-Ping Chung, Jhih Fan Tu
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Publication number: 20240096800Abstract: A semiconductor device includes first and second active regions extending in parallel in a substrate, a plurality of conductive patterns, each conductive pattern of the plurality of conductive patterns extending on the substrate across each of the first and second active regions, and a plurality of metal lines, each metal line of the plurality of metal lines overlying and extending across each of the first and second active regions. Each conductive pattern of the plurality of conductive patterns is electrically connected in parallel with each metal line of the plurality of metal lines.Type: ApplicationFiled: November 27, 2023Publication date: March 21, 2024Inventors: Fei Fan DUAN, Fong-yuan CHANG, Chi-Yu LU, Po-Hsiang HUANG, Chih-Liang CHEN
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Patent number: 11937515Abstract: Semiconductor device and methods of forming the same are provided. A semiconductor device according to one embodiment includes a dielectric layer including a top surface, a plurality of magneto-resistive memory cells disposed in the dielectric layer and including top electrodes, a first etch stop layer disposed over the dielectric layer, a common electrode extending through the first etch stop layer to be in direct contact with the top electrodes, and a second etch stop layer disposed on the first etch stop layer and the common electrode. Top surfaces of the top electrodes are coplanar with the top surface of the dielectric layer.Type: GrantFiled: August 9, 2022Date of Patent: March 19, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Fan Huang, Hsiang-Ku Shen, Liang-Wei Wang, Chen-Chiu Huang, Dian-Hau Chen, Yen-Ming Chen
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Publication number: 20240078170Abstract: A setting method of in-memory computing simulator includes: performing a plurality of test combinations by an in-memory computing device and recording a plurality of first estimation indices corresponding to the plurality of test combinations respectively, wherein each of the plurality of test combinations includes one of a plurality of neural network models and one of a plurality of datasets, executing a simulator according to the plurality of test combinations by a processing device and recording a plurality of second estimation indices corresponding to the plurality of test combinations respectively, wherein the simulator has a plurality of adjustable settings; calculating a correlation sum according to the plurality of first estimation indices and the plurality of second estimation indices by the processing device, and performing an optimal algorithm to search an optimal parameter in the setting space constructed by the plurality of settings so that the correlation sum is maximal.Type: ApplicationFiled: November 21, 2022Publication date: March 7, 2024Inventors: Ke-Han Li, Chih-Fan Hsu, Yu-Sheng Lin, Wei-Chao CHEN
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Publication number: 20240080180Abstract: The federated learning system includes a moderator and client devices. Each client device performs a method for verifying model update as follows: receiving a hash function and a general model; training a client model according to the general model and raw data; calculating a difference as an update parameter between the general model and the client model, sending the update parameter to the moderator; inputting the update parameter to the hash function to generate a hash value; sending the hash value to other client devices, and receiving other hash values; summing all the hash values to generate a trust value; receiving an aggregation parameter calculated according to the update parameters; inputting the aggregation parameter to the hash function to generate a to-be-verified value; and updating the client model according to the aggregation parameter when the to-be-verified value equals the trust value.Type: ApplicationFiled: December 20, 2022Publication date: March 7, 2024Inventors: Chih-Fan HSU, Wei-Chao CHEN, Jing-Lun Huang, Ming-Ching Chang, Feng-Hao Liu
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Publication number: 20240080452Abstract: A video encoder with quality estimation is shown. The video encoder has a video compressor, a video reconstructor, a quality estimator, and an encoder top controller. The video compressor receives the source data of a video to generate compressed data. The video reconstructor is coupled to the video compressor for generation of playback-level data that is buffered for inter prediction by the video compressor, wherein the video reconstructor generates intermediate data and, based on the intermediate data, the video reconstructor generates playback-level data. The quality estimator is coupled to the video reconstructor to receive the intermediate data. Quality estimation is performed based on the intermediate data rather than the playback-level data. Based on the quality estimation result, the encoder top controller adjusts at least one video compression factor in real time.Type: ApplicationFiled: July 12, 2023Publication date: March 7, 2024Inventors: Tung-Hsing WU, Chih-Hao CHANG, Yi-Fan CHANG, Han-Liang CHOU
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Patent number: 11923405Abstract: The present disclosure is directed to a semiconductor device. The semiconductor device includes a substrate, an insulating layer disposed on the substrate, a first conductive feature disposed in the insulating layer, and a capacitor structure disposed on the insulating layer. The capacitor structure includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode sequentially stacked. The semiconductor device also includes a first via connected to the first electrode and the third electrode, a second via connected to the second electrode, and a third via connected to the first conductive feature. A part of the first via is disposed in the insulating layer. A portion of the first conductive feature is directly under the capacitor structure.Type: GrantFiled: May 23, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
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Patent number: 11923486Abstract: A light-emitting module and a light-emitting diode are provided. The light-emitting diode includes an epitaxial light-emitting structure to generate a light beam with a broadband blue spectrum. A spectrum waveform of the broadband blue spectrum has a full width at half maximum (FWHM) larger than or equal to 30 nm. The spectrum waveform has a plurality of peak inflection points, and a difference between two wavelength values to which any two adjacent ones of the peak inflection points respectively correspond is less than or equal to 18 nm.Type: GrantFiled: July 20, 2022Date of Patent: March 5, 2024Assignee: KAISTAR LIGHTING(XIAMEN) CO., LTD.Inventors: Jing-Qiong Zhang, Ben-Jie Fan, Hung-Chih Yang, Shuen-Ta Teng
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Publication number: 20240036198Abstract: Embodiments of the present disclosure provide an optical ranging device capable of reducing or eliminating pile up effect in DToF ranging method. The optical ranging device comprises a light source; a sensor module comprising a SPAD array, wherein the SPAD array comprises a first SPAD group without aperture and a second SPAD group with a first aperture, and the sensor module separately outputs a photon detection value corresponding to a number of photons received by each SPAD group; and a processing module for calculating a distance between the object to be measured and the ranging device using the photon detection value based on DToF. In response to light intensity received by the SPAD array in a first pulse window being greater than a first threshold, the distance is calculated using the photon detection value of the second SPAD group in the first pulse window.Type: ApplicationFiled: December 27, 2022Publication date: February 1, 2024Inventors: Wan-Jung Lo, Chen-Chih Fan
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Publication number: 20240030952Abstract: Embodiments of this disclosure may include a receiver with a reconfigurable processing path for different signal conditions. Such a receiver may reconfigure between a mixer-first configuration and an amplifier-first configuration. In the mixer-first configuration, an RF input signal is not passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. In the amplifier-first configuration, an RF input signal is passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. Reconfiguring the receiver between mixer-first and amplifier-first configurations may be performed based on detection of jammer signals and/or measurement of signal-to-noise ratio (SNR).Type: ApplicationFiled: October 5, 2023Publication date: January 25, 2024Inventors: Jang Joon Lee, Kyle David Holland, Jian Kang, Aleksandar Miodrag Tasic, Chih-Fan Liao, Yingying Li, Lai Kan Leung, Chiewcharn Narathong
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Patent number: 11855022Abstract: Semiconductor device packages and method are provided. A semiconductor device package according to the present disclosure includes a substrate including a first region, a passive device disposed over the first region of the substrate, a contact pad disposed over the passive device, a passivation layer disposed over the contact pad, a recess through the passivation layer, and an under-bump metallization (UBM) layer. The recess exposes the contact pad and the UBM layer includes an upper portion disposed over the passivation layer and a lower portion disposed over a sidewall of the recess. A projection of the upper portion of the UBM layer along a direction perpendicular to the substrate falls within an area of the contact pad.Type: GrantFiled: June 30, 2022Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Fan Huang, Hui-Chi Chen, Kuo-Chin Chang, Chien-Huang Yeh, Hong-Seng Shue, Dian-Hau Chen, Yen-Ming Chen
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Publication number: 20230409965Abstract: A federated learning method using data digest includes: sending a general model to multiple client devices by a moderator, generating encoded features according to raw data and performing a training procedure by each client device, wherein the training procedure includes “updating the general model to generate a client model, selecting at least two encoded features and at least two labels to compute a feature weighted sum and a label weighted sum, sending the feature weighted sum and the label weighted sum as a digest to the moderator and send update parameters of the client model”, and “determining an absent client and an present client among the client devices, generating a replacement model according to the general model and the absent client, generating an aggregation model according to the present client and the replacement model, and training the aggregation model to update the general model” by the moderator.Type: ApplicationFiled: December 20, 2022Publication date: December 21, 2023Inventors: Chih-Fan HSU, Wei-Chao Chen, Ming-Ching Chang
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Publication number: 20230387183Abstract: Semiconductor structures and methods of forming the same are provided. A method according to an embodiment includes forming a conductive feature and a first conductive plate over a substrate, conformally depositing a dielectric layer over the conductive feature and the first conductive plate, conformally depositing a conductive layer over the conductive feature and the first conductive plate, and patterning the conductive layer to form a second conductive plate over the first conductive plate and a resistor, the resistor includes a conductive line extending along a sidewall of the conductive feature. By employing the method, a high-resistance resistor may be formed along with a capacitor regardless of the resolution limit of, for example, lithography.Type: ApplicationFiled: July 25, 2023Publication date: November 30, 2023Inventors: Chih-Fan Huang, Hsiang-Ku Shen, Dian-Hau Chen, Yen-Ming Chen
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Patent number: 11799507Abstract: Embodiments of this disclosure may include a receiver with a reconfigurable processing path for different signal conditions. Such a receiver may reconfigure between a mixer-first configuration and an amplifier-first configuration. In the mixer-first configuration, an RF input signal is not passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. In the amplifier-first configuration, an RF input signal is passed through an LNA for amplification before processing the RF input signal for downconversion to baseband and eventual extraction of the information in the signal. Reconfiguring the receiver between mixer-first and amplifier-first configurations may be performed based on detection of jammer signals and/or measurement of signal-to-noise ratio (SNR).Type: GrantFiled: September 22, 2021Date of Patent: October 24, 2023Assignee: QUALCOMM IncorporatedInventors: Jang Joon Lee, Kyle David Holland, Jian Kang, Aleksandar Miodrag Tasic, Chih-Fan Liao, Yingying Li, Lai Kan Leung, Chiewcharn Narathong
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Publication number: 20230336001Abstract: A power supply system with current sharing includes a current sharing bus, a plurality of power supply units, and a plurality of controllers. The power supply units are connected to each other through the current sharing bus. Each power supply unit provides a current sharing signal value to the current sharing bus, and provides an output current to a load. Each controller receives current sharing signal values provided from other power supply units and current signal values corresponding to the output currents. When determining that the current signal value is less than a reference current sharing signal value, the controller increases an output voltage of the power supply unit to increase the output current. Otherwise, the controller decreases the output voltage to decrease the output current so that so that the output currents of the power supply units are shared to supply power to the load.Type: ApplicationFiled: November 10, 2022Publication date: October 19, 2023Inventors: Chien-Li TSAI, Chih-Fan LIN, Chih-Hsien HSIEH
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Patent number: 11791371Abstract: Semiconductor structures and methods of forming the same are provided. A method according to an embodiment includes forming a conductive feature and a first conductive plate over a substrate, conformally depositing a dielectric layer over the conductive feature and the first conductive plate, conformally depositing a conductive layer over the conductive feature and the first conductive plate, and patterning the conductive layer to form a second conductive plate over the first conductive plate and a resistor, the resistor includes a conductive line extending along a sidewall of the conductive feature. By employing the method, a high-resistance resistor may be formed along with a capacitor regardless of the resolution limit of, for example, lithography.Type: GrantFiled: August 30, 2021Date of Patent: October 17, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chih-Fan Huang, Hsiang-Ku Shen, Dian-Hau Chen, Yen-Ming Chen
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Publication number: 20230310779Abstract: Various control methods can indirectly determine incorrect connections between components in a respiratory therapy system. For example, errors in the connections can occur between a patient interface, a humidifier and/or a gases source. The methods can indirectly detect if a reverse flow condition exists or other error conditions. A reverse flow condition can occur when gases flows in a direction different from an intended direction of flow. The detection of the reverse flow condition can be indicative of likely errors in connections between the humidifier, patient interface and/or gases source.Type: ApplicationFiled: April 6, 2023Publication date: October 5, 2023Inventors: Po-Yen Liu, Ivan Chih-Fan Teng, Peter Alan Seekup, Daniel John Smith, Ho Shing Lo
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Publication number: 20230317651Abstract: Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method includes depositing a first dielectric layer over a metal pad disposed over a workpiece, forming a first opening in the first dielectric layer to expose a portion of the metal pad, after the forming of the first opening, forming a second dielectric layer over the exposed portion of the metal pad, depositing a first polymeric material over the second dielectric layer, forming a second opening through the first polymeric material and the second dielectric layer to expose the metal pad, and forming a bump feature over the exposed metal pad.Type: ApplicationFiled: June 5, 2023Publication date: October 5, 2023Inventors: Chih-Fan Huang, Yen-Ming Chen, Chih-Sheng Li, Hui-Chi Chen, Chih-Hung Lu, Dian-Hau Chen