Abstract: A voltage conversion device includes a filter circuit, a first inductor, a second inductor a first conversion module, a second conversion module, and a control circuit. The filter circuit is electrically connected to a first AC terminal and a second AC terminal. The first inductor is electrically connected to the first AC terminal and a first conversion terminal. The second inductor is electrically connected to the second AC terminal and a second conversion terminal. The first conversion module is electrically connected to a first DC voltage terminal, a second DC voltage terminal, and the first conversion terminal. The second conversion module is electrically connected to the first DC voltage terminal, the second DC voltage terminal, and the second conversion terminal. The control circuit transmits switch-control signals to the first conversion module and the second conversion module. A voltage conversion method is used with the voltage conversion device.

Abstract: In an embodiment, a package includes an integrated circuit device attached to a substrate; an encapsulant disposed over the substrate and laterally around the integrated circuit device, wherein a top surface of the encapsulant is coplanar with the top surface of the integrated circuit device; and a heat dissipation structure disposed over the integrated circuit device and the encapsulant, wherein the heat dissipation structure includes a spreading layer disposed over the encapsulant and the integrated circuit device, wherein the spreading layer includes a plurality of islands, wherein at least a portion of the islands are arranged as lines extending in a first direction in a plan view; a plurality of pillars disposed over the islands of the spreading layer; and nanostructures disposed over the pillars.

Abstract: An interpolation FIR filter uses a coefficient to generate an interpolation value of a first and second input value. The interpolation FIR filter has several arithmetic units, an adder, and a divider. The nth arithmetic unit outputs a partial product by selecting one of the first and second input values according to an nth bit of the coefficient, and multiplying the selected input value by 2(n?1). The adder outputs a sum all the partial products and the first input value. The divider divides the sum by 2m, wherein m is an amount of the arithmetic units.

Abstract: An interpolation FIR filter uses a coefficient to generate an interpolation value of a first and second input value. The interpolation FIR filter has several arithmetic units, an adder, and a divider. The nth arithmetic unit outputs a partial product by selecting one of the first and second input values according to an nth bit of the coefficient, and multiplying the selected input value by 2(n?1). The adder outputs a sum all the partial products and the first input value. The divider divides the sum by 2m, wherein m is an amount of the arithmetic units.