Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor device. The semiconductor device comprises a source region and a drain region in a substrate and laterally spaced. A gate stack is over the substrate and between the source region and the drain region. The drain region includes two or more first doped regions having a first doping type in the substrate. The drain region further includes one or more second doped regions in the substrate. The first doped regions have a greater concentration of first doping type dopants than the second doped regions, and each of the second doped regions is disposed laterally between two neighboring first doped regions.

Abstract: An integrated circuit (IC) configurable to perform adaptive thermal ceiling control in a per-functional-block manner, an associated main circuit, an associated electronic device and an associated thermal control method are provided. The IC may include a plurality of hardware circuits arranged to perform operations of a first functional block, and at least one thermal control circuit. At least one temperature sensor is coupled with the first functional block to detect temperature and to generate at least one temperature sensing result of the first functional block.

Abstract: A multi-processor system performs thermal-aware task scheduling and task migration. Based on temperature measurements, the system determines one or more thermal conditions of each processor. The thermal conditions include a present temperature, a historical temperature, a predicted temperature, and thermal headroom of the processor. A scheduler identifies a target processor among the processors based on, at least in part, the one or more thermal conditions of each processor, and assigns a task to be executed by the target processor. For task migration, the system detects that a source processor satisfies a task migration criterion by comparing one or more of the thermal conditions of the source processor with corresponding thresholds. The scheduler identifies a target processor based on, at least in part, one or more of the thermal conditions of each processor, and migrates a task from the source processor to the target processor for execution.

Abstract: The present invention discloses a network apparatus and enabling method thereof. During the procedure of voltage biasing or host booting, an enabling signal generated in this network apparatus is provided for enabling the internal application circuit at first. At the time of data connection between the network apparatus and a corresponding host apparatus, the host apparatus is able to enable or disable the application circuit of the network apparatus via a predetermined pin.

Abstract: The present invention relates to a method and a circuit for power switching. The method comprises the steps of: providing a operation circuit; receiving a command from a Host and setting up a power mode of the operation circuit; supplying a first rated consuming power source and then a second rated consuming power source to the operation circuit via the power switching circuit according to power mode; detecting the transferring process form the first rated consuming power source to second rated consuming power source; and preventing over current according to detecting result.

Abstract: An electronic apparatus has a stand-by mode. The electronic apparatus includes a first circuit, a second circuit and a third circuit. The first circuit has an interface and transfers data to an external device. The second circuit has a processor and sets a first power supplying mode of the first circuit. The third circuit sets a second circuit power supplying mode of the second circuit and sets a second power supply mode of the first circuit when the second circuit is disabled. The processor selects a first circuit power supplying mode from power supplying modes of the first circuit as the second power supplying mode before the second circuit is disabled.

Abstract: The present invention relates to an electronic device, which comprises: a first module, comprising an I/O pad for being an interface between the electronic device and an external device, and receiving a first bias source; a second module, coupled to the first module, comprising a register, and receiving a second bias source; and a signal converter, coupled between the first module and the second module. Wherein when one of the first and second bias sources is stable and the other is unstable, the signal converter outputs a first predetermined bias value to the first or second modules receiving the unstable bias source.

Abstract: The present invention discloses a network apparatus and enabling method thereof. During the procedure of voltage biasing or host booting, an enabling signal generated in this network apparatus is provided for enabling the internal application circuit at first. At the time of data connection between the network apparatus and a corresponding host apparatus, the host apparatus is able to enable or disable the application circuit of the network apparatus via a predetermined pin.

Abstract: The present invention relates to a method and a circuit for power switching. The method comprises the steps of: providing a operation circuit; receiving a command from a Host and setting up a power mode of the operation circuit; supplying a first rated consuming power source and then a second rated consuming power source to the operation circuit via the power switching circuit according to power mode; detecting the transferring process form the first rated consuming power source to second rated consuming power source; and preventing over current according to detecting result.

Abstract: The present invention relates to an electronic device, which comprises: a first module, comprising an I/O pad for being an interface between the electronic device and an external device, and receiving a first bias source; a second module, coupled to the first module, comprising a register, and receiving a second bias source; and a signal converter, coupled between the first module and the second module. Wherein when one of the first and second bias sources is stable and the other is unstable, the signal converter outputs a first predetermined bias value to the first or second modules receiving the unstable bias source.

Abstract: The present invention relates to an electronic apparatus having stand-by mode. The electronic apparatus comprises: a first circuit, comprising an interface and transferring data to an external device; a second circuit, comprising a processor and setting a first power supplying mode of the first circuit; and a third circuit, setting a second circuit power supplying mode of the second circuit and setting a second power supply mode of the first circuit when the second circuit is disabled; wherein the processor selects a first circuit power supplying mode from power supplying modes of a plurality of first circuits as the second power supplying mode before the second circuit is disabled.

Abstract: A conversion interface of memory device is provided for converting a current operating command of a user's software program to an operating command capable of being executed by the memory device. The conversion interface includes a command decoding module and a command generating module. The command decoding module receives the operating command of the user's software program and decodes the operating command to a decoding command, such that the command generating module generates the operating command capable of being executed by the memory device according to the decoding command. This can realize compatibility between a current software program and a new type of memory device, thereby effectively reducing the design costs and product development cycle and providing great flexibility in design.

Abstract: A selectively-switchable bus connecting device is proposed, which is designed for use in conjunction with a chip device for connecting the multiple signal lines of the chip device's internal bus in a user-specified mapping manner to the multiple signal lines of a socket on an external circuit board. This feature allows chip devices of the same type to be usable for mounting on different types of circuit boards having different socket signal line arrangements, with the benefits of flexible arrangements and cost-effective design and manufacture of circuit boards with chip devices.

Abstract: A bus integrating system is applied to a data processing system. A bus controlling module is coupled to at least one peripheral device for enabling a corresponding device to access data according to a data access request signal sent from the peripheral device. A bus integrating processor includes at least one first bus data access signal pin and at least one second bus data access signal pin, so as to allow the bus controlling module to control peripheral devices connected to buses of a first data transmission standard and a second data transmission standard to perform data access with another peripheral device of the same and different data transmission standard via the single bus integrating processor. Thereby, the bus integrating system allows buses with different data transmission standards to transmit data via a single bus and the integrating bus controlling module.