Patents by Inventor Chih-Han Tseng

Chih-Han Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250087533
    Abstract: A method of forming a semiconductor device includes: forming a via in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; forming an opening in the second dielectric layer, where the opening exposes an upper surface of the via; selectively forming a capping layer over the upper surface of the via, where the capping layer has a curved upper surface that extends above a first upper surface of the first dielectric layer distal from the substrate; after forming the capping layer, forming a barrier layer in the opening over the capping layer and along sidewalls of the second dielectric layer exposed by the opening; and filling the opening by forming an electrically conductive material over the barrier layer.
    Type: Application
    Filed: March 28, 2024
    Publication date: March 13, 2025
    Inventors: Ming-Hsing Tsai, Ya-Lien Lee, Chih-Han Tseng, Kuei-Wen Huang, Kuan-Hung Ho, Ming-Uei Hung, Chih-Cheng Kuo, Yi-An Lai, Wei-Ting Chen
  • Publication number: 20240312901
    Abstract: An interconnect structure including a contact via in an interlayer dielectric, a first conductive feature in a first dielectric layer, the first dielectric layer over the interlayer dielectric, a first liner in the first dielectric layer, the first liner comprising a first part in contact with a sidewall surface of the first conductive feature, and a second part in contact with a bottom surface of the first conductive feature. The interconnect structure includes a first cap layer in contact with a top surface of the first conductive feature, a second conductive feature in a second dielectric layer, the second dielectric layer over the first dielectric layer, a second liner in the second dielectric layer, wherein the first and second conductive features comprise a first conductive material, and the contact via, first liner, first cap layer, and second liner comprise a second conductive material chemically different than the first conductive material.
    Type: Application
    Filed: July 12, 2023
    Publication date: September 19, 2024
    Inventors: Chien CHANG, Yen-Chun LIN, Jen-Wei LIU, Chih-Han TSENG, Harry CHIEN, Cheng-Hui WENG, Chun-Chieh LIN, Hung-Wen SU, Ming-Hsing TSAI, Chih-Wei CHANG
  • Publication number: 20240274555
    Abstract: Embodiments provide a method and resulting structure that includes forming an opening in a dielectric layer to expose a metal feature, selectively depositing a metal cap on the metal feature, depositing a barrier layer over the metal cap, and depositing a conductive fill on the barrier layer.
    Type: Application
    Filed: May 8, 2023
    Publication date: August 15, 2024
    Inventors: Wei-Jen Lo, Syun-Ming Jang, Ming-Hsing Tsai, Chun-Chieh Lin, Hung-Wen Su, Ya-Lien Lee, Chih-Han Tseng, Chih-Cheng Kuo, Yi-An Lai, Kevin Huang, Kuan-Hung Ho