Patents by Inventor Chih-Hao Chao

Chih-Hao Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162218
    Abstract: An electrostatic discharge device including a gate structure, a plurality of first doped regions, and a plurality of second doped regions. The gate structure is disposed on a substrate. The gate structure includes a body part and a plurality of extension parts. The extension parts are connected with the body part, and an extension direction of the body part is different from an extension direction of the extension parts. The first doped regions are located in the substrate between the extension parts. The second doped regions are located in the substrate at two outer sides of the extension parts. The first doped regions and the second doped regions have different conductivity types.
    Type: Application
    Filed: February 6, 2023
    Publication date: May 16, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chih Hsiang Chang, Mei-Ling Chao, Yin-Chia Tsai, Tien-Hao Tang, Kuan-Cheng Su
  • Publication number: 20240118491
    Abstract: A photonic semiconductor device including a light-emitting component and a photonic integrated circuit is provided. The light-emitting component at least includes a gain medium layer, a first contact layer and a first optical coupling layer stacked to each other. The photonic integrated circuit includes a second optical coupling layer. The light-emitting component and the photonic integrated circuit are stacked in a stacking direction, the first optical coupling layer has a first taper portion, the second optical coupling layer has a second taper portion, and the first taper portion and the second taper portion overlap in the stacking direction. Accordingly, the light emitted from the gain medium layer may be transmitted to the second taper portion from the first taper portion by optical coupling in a short length of an optical coupling path.
    Type: Application
    Filed: January 19, 2023
    Publication date: April 11, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao YU, Jui Lin CHAO, Hsing-Kuo HSIA, Shih-Peng TAI, Kuo-Chung YEE
  • Publication number: 20240103218
    Abstract: Optical devices and methods of manufacture are presented in which a laser die or other heterogeneous device is embedded within an optical device and evanescently coupled to other devices. The evanescent coupling can be performed either from the laser die to a waveguide, to an external cavity, to an external coupler, or to an interposer substrate.
    Type: Application
    Filed: January 12, 2023
    Publication date: March 28, 2024
    Inventors: Hsing-Kuo Hsia, Jui Lin Chao, Chen-Hua Yu, Chih-Hao Yu, Shih-Peng Tai
  • Publication number: 20230062848
    Abstract: A semiconductor device manufacturing system and a method for manufacturing semiconductor device are provided. The semiconductor device manufacturing system includes a substrate processing device and a processor. The substrate processing device includes a processing chamber, a gas supply module and a gas source. The processor is configured to monitor and control the gas supplied into the substrate processing device.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: WEI-CHUN HSU, YUNG-LI TSAI, SHENG-WEI WU, CHIH-HAO CHAO, YU-HAO HUANG
  • Publication number: 20090138536
    Abstract: The present invention discloses a precision-sensing linear interpolation algorithm, which is distinct from the conventional technology in that precision detection is performed before iterative division calculations. The iteration number of iterative division calculations is determined according to the required precision. After the iterative division calculations, the bits in the decimal places unnecessary for the required precision are set to be 0 with a bit-masking method. Via the precision detection and bit mask, the present invention can promote algorithm efficiency and reduce dynamic power consumption.
    Type: Application
    Filed: November 27, 2007
    Publication date: May 28, 2009
    Inventors: Chih-Hao Chao, Yen-Lin Kuo, An-Yen Wu