Abstract: A bonded assembly may be formed by performing a chip plasma clean process on a semiconductor chip; generating at least one chip infrared image of a cleaned side of the semiconductor chip; measuring an average emissivity of at least one metallic region in the at least one chip infrared image; performing a subsequent processing step selected from a bonding step and an alternative processing step based on the measured average emissivity. The bonding step is performed if the measured average emissivity is less than a predetermined emissivity threshold value. The alternative processing step is performed if the measured average emissivity is greater than the predetermined emissivity threshold value. The alternative processing step may be selected from an additional clean step and an additional inspection step.

Abstract: A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.

Abstract: A hybrid body temperature measurement system and a hybrid body temperature measurement method are provided. In the method, position sensing data is obtained. The position sensing data includes an azimuth of one or more to-be-detected objects relative to a reference position. The position sensing data is mapped to a thermal image so as to generate a mapping result. The thermal image is formed in response to a temperature. A position of the to-be-detected object in the thermal image is determined according to the mapping result. Accordingly, the detection accuracy is improved.

Abstract: A bonded assembly may be formed by: providing a substrate and a semiconductor chip in a low-oxygen ambient having an oxygen partial pressure that is lower than 17 kPa; disposing the semiconductor chip on the substrate; performing a plasma treatment process on a copper-containing surface of a chip bonding pad on the semiconductor chip in the low-oxygen ambient by directing a plasma jet to the chip bonding pad; and attaching a bonding wire to the semiconductor chip and to the substrate such that a first end of the bonding wire is attached to the copper-containing surface and a second end of the bonding wire is attached to a substrate bonding pad on the substrate.

Abstract: A semiconductor device structure and methods of forming the same are described. In some embodiments, the method includes depositing an etch stop layer on a substrate, depositing a first substrate layer on the etch stop layer, forming a plurality of active devices on the first substrate layer, forming an interconnection structure over the active devices, flipping over the substrate, removing the substrate, removing the etch stop layer to expose the first substrate layer, and forming a cooling substrate layer on the exposed first substrate layer. The cooling substrate layer has a thermal conductivity substantially greater than a thermal conductivity of the substrate.

Abstract: A semiconductor device according to the present disclosure includes a bottom dielectric feature on a substrate, a plurality of channel members directly over the bottom dielectric feature, a gate structure wrapping around each of the plurality of channel members, two first epitaxial features sandwiching the bottom dielectric feature along a first direction, and two second epitaxial features sandwiching the plurality of channel members along the first direction.

Abstract: A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.

Abstract: A semiconductor device includes a first well region having the first conductivity type and a second well region having the second conductivity type formed in a substrate having the first conductivity type. An isolation component and a third well region are formed in the second well region. The third well region has the first conductivity type and is in contact with the bottom surface of the isolation component. A first doping region is formed in the first well region and a second doping region is formed in the second well region. The first and second doping regions have the second conductivity type and are disposed at opposite sides of the gate structure. The interface between the first well region and the second well region is positioned between the isolation component and the first doping region. The interface is separated from the third well region by a lateral distance.

Abstract: Semiconductor devices and methods of forming the same are provided. An exemplary semiconductor device according to the present disclosure includes a first gate structure disposed over a first backside dielectric feature, a second gate structure disposed over a second backside dielectric feature, and a gate cut feature extending continuously from laterally between the first gate structure and the second gate structure to laterally between the first backside dielectric feature and the second backside dielectric feature. The gate cut feature includes an air gap laterally between the first gate structure and the second gate structure.

Abstract: A method related to magnetic field interference and a sensing system are provided. In the method, magnetic field uniformity within a time period is determined. Movement situation within the time period is determined. Magnetic field interference situation is determined according to the magnetic field uniformity and the movement situation.

Abstract: A semiconductor device according to the present disclosure includes a bottom dielectric feature on a substrate, a plurality of channel members directly over the bottom dielectric feature, a gate structure wrapping around each of the plurality of channel members, two first epitaxial features sandwiching the bottom dielectric feature along a first direction, and two second epitaxial features sandwiching the plurality of channel members along the first direction.

Abstract: An identification method applicable to a wireless motion capturing system with multiple wearable devices, which is used to capture the movements of a user operating a virtual avatar model. The identification method includes: receiving a sensor data, where the sensor data is associated with a motion feature, and the motion feature corresponds to nodes of the virtual avatar model; and analyzing the sensor data and identifying the wearable devices as at least one of the nodes.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a stack of semiconductor nanostructures over a base structure and a first epitaxial structure and a second epitaxial structure sandwiching the semiconductor nanostructures. The semiconductor device structure also includes a gate stack wrapped around each of the semiconductor nanostructures and a backside conductive contact connected to the second epitaxial structure. A first portion of the backside conductive contact is directly below the base structure, and a second portion of the backside conductive contact extends upwards to approach a bottom surface of the second epitaxial structure. The semiconductor device structure further includes an insulating spacer between a sidewall of the base structure and the backside conductive contact.

Abstract: A calculation method and a detection device for detecting a power capacity of a battery of an electronic device are provided. In the calculation method, a highest voltage value and a lowest voltage value of the battery are received. A unit voltage difference value is generated according to the highest voltage value and the lowest voltage value. A voltage value of the battery is converted into voltage value data, and the electronic device is controlled in an operation mode to obtain a time length required for the voltage value data to drop to the unit voltage difference value in the operation mode. A total discharge capacity of the battery is generated according to the time length and a use time interval of the electronic device in the operation mode, and a current power capacity is generated according to the total discharge capacity.

Abstract: A package structure and a formation method are provided. The method includes disposing a first chip structure over a carrier substrate. The first chip structure has a front-side interconnection structure facing the carrier substrate. The method also includes forming a back-side interconnection structure over the first chip structure. The first chip structure has a device portion between the back-side interconnection structure and the front-side interconnection structure. The back-side interconnection structure has stacked conductive vias. The method further includes bonding a second chip structure to the first chip structure using dielectric-to-dielectric bonding and metal-to-metal bonding.

Abstract: Semiconductor devices and methods of forming the same are provided. A method according to the present disclosure includes providing a workpiece including a frontside and a backside. The workpiece includes a substrate, a first plurality of channel members over a first portion of the substrate, a second plurality of channel members over a second portion of the substrate, an isolation feature sandwiched between the first and second portions of the substrate. The method also includes forming a joint gate structure to wrap around each of the first and second pluralities of channel members, forming a pilot opening in the isolation feature, extending the pilot opening through the join gate structure to form a gate cut opening that separates the joint gate structure into a first gate structure and a second gate structure, and depositing a dielectric material into the gate cut opening to form a gate cut feature.

Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.

Abstract: A method for retrofitting exercise machines includes removably attaching a sensor module to a moving part of an exercise machine, the sensor module being configured to detect movements of the moving part and transmit the detected data by a first wireless communication connection, placing a control module in a vicinity of yet separated from the exercise machine, the control module being configured to receive the detected data, calculate an angle value and a speed range using the detected data and transmit the angle value and the speed range by a second wireless communication connection, providing a remote cloud-based application server configured to receive the angle value and the speed range via the second wireless communication connection, verify a user, produce data packets based on the angle value, the speed range and the verified user information and transmit the data packets to a display device.

Abstract: A method for retrofitting exercise machines includes removably attaching a sensor module to a moving part of an exercise machine, the sensor module being configured to detect movements of the moving part and transmit the detected data by a first wireless communication connection, placing a control module in a vicinity of yet separated from the exercise machine, the control module being configured to receive the detected data, calculate an angle value and a speed range using the detected data and transmit the angle value and the speed range by a second wireless communication connection, providing a remote cloud-based application server configured to receive the angle value and the speed range via the second wireless communication connection, verify a user, produce data packets based on the angle value, the speed range and the verified user information and transmit the data packets to a display device.

Abstract: A thermal image positioning method for determining a heat source location of the thermal image is disclosed. The thermal image positioning method includes obtaining a temperature array corresponding to the thermal image and determining a region of interest (ROI) of the temperature array. The thermal image positioning method further includes determining an ROI center reference point of the ROI, determining a plurality of corner points corresponding to the ROI, and determining the heat source location according to at least one of the plurality of corner points. A thermal image positioning system is also disclosed herein.