Patents by Inventor Chih-Hao Wu

Chih-Hao Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250107268
    Abstract: A plurality of holes in a top surface of a silicon medium form a plurality of sub-meta lenses to result in multiple focal points rather than a single point (resulting from using a single meta lens). As a result, optical paths for incoming light are reduced as compared with a single optical path associated with a single meta lens, which in turn reduces angular response of incident photons. Thus, a pixel sensor including the plurality of sub-meta lenses experiences improved light focus and greater signal-to-noise ratio. Additionally, dimensions of the pixel sensor are reduced (particularly a height of the pixel sensor), which allows for greater miniaturization of an image sensor that includes the pixel sensor.
    Type: Application
    Filed: September 22, 2023
    Publication date: March 27, 2025
    Inventors: Yi-Hsuan WANG, Cheng Yu HUANG, Chun-Hao CHUANG, Keng-Yu CHOU, Wen-Hau WU, Wei-Chieh CHIANG, Chih-Kung CHANG
  • Publication number: 20250098343
    Abstract: Various embodiments of the present application are directed towards an image sensor including a wavelength tunable narrow band filter, as well as methods for forming the image sensor. In some embodiments, the image sensor includes a substrate, a first photodetector, a second photodetector, and a filter. The first and second photodetectors neighbor in the substrate. The filter overlies the first and second photodetectors and includes a first distributed Bragg reflector (DBR), a second DBR, and a first interlayer between the first and second DBRs. A thickness of the first interlayer has a first thickness value overlying the first photodetector and a second thickness value overlying the second photodetector. In some embodiments, the filter is limited to a single interlayer. In other embodiments the filter further includes a second interlayer defining columnar structures embedded in the first interlayer and having a different refractive index than the first interlayer.
    Type: Application
    Filed: December 4, 2024
    Publication date: March 20, 2025
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Kazuaki Hashimoto, Keng-Yu Chou, Wei Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 12256488
    Abstract: Provided is a circuit board structure including a substrate, a loop-wrapping ground layer, an insulating structure, a first build-up layer, a top wiring layer, a bottom wiring layer, a first conductive via, and a plurality of second conductive vias. The aforementioned structure defines a signal transmitting structure. An equivalent circuit of the signal transmitting structure at least includes a first equivalent circuit, a second equivalent circuit, a third equivalent circuit and a fourth equivalent circuit, which correspond to different uniform transmitting sections respectively. The first equivalent circuit, the second equivalent circuit, the third equivalent circuit and the fourth equivalent circuit are connected in series with each other according to an ABCD transmission matrix series connection principle.
    Type: Grant
    Filed: February 1, 2023
    Date of Patent: March 18, 2025
    Assignee: Unimicron Technology Corp.
    Inventors: Chih-Chiang Lu, Jun-Rui Huang, Ming-Hao Wu, Tung-Chang Lin
  • Patent number: 12255104
    Abstract: A dummy gate electrode and a dummy gate dielectric are removed to form a recess between adjacent gate spacers. A gate dielectric is deposited in the recess, and a barrier layer is deposited over the gate dielectric. A first work function layer is deposited over the barrier layer. A first anti-reaction layer is formed over the first work function layer, the first anti-reaction layer reducing oxidation of the first work function layer. A fill material is deposited over the first anti-reaction layer.
    Type: Grant
    Filed: August 2, 2023
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chia-Ching Lee, Hsin-Han Tsai, Shih-Hang Chiu, Tsung-Ta Tang, Chung-Chiang Wu, Hung-Chin Chung, Hsien-Ming Lee, Da-Yuan Lee, Jian-Hao Chen, Chien-Hao Chen, Kuo-Feng Yu, Chia-Wei Chen, Chih-Yu Hsu
  • Patent number: 12249649
    Abstract: A semiconductor device includes a fin-shaped structure on the substrate, a shallow trench isolation (STI) around the fin-shaped structure, a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure, a second gate structure on the STI, and a third gate structure on the SDB structure. Preferably, a width of the third gate structure is greater than a width of the second gate structure and each of the first gate structure, the second gate structure, and the third gate structure includes a U-shaped high-k dielectric layer, a U-shaped work function metal layer, and a low-resistance metal layer.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: March 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Han Wu, Hsin-Yu Chen, Chun-Hao Lin, Shou-Wei Hsieh, Chih-Ming Su, Yi-Ren Chen, Yuan-Ting Chuang
  • Publication number: 20250079984
    Abstract: A conversion control circuit controls plural stackable sub-converters which are coupled in parallel to generate an output power to a load. The conversion control circuit includes a current sharing terminal and a current sharing circuit. A current sharing signal is connected, in parallel, to the current sharing terminals. The current sharing circuit includes: configuration (1): the current sharing signal is generated only according to an inductor current corresponding to one of plural inductors of the plural stackable sub-converters; or configuration (2): the current sharing signal is generated according to plural inductor currents corresponding to plural inductors of plural activated phases of the plural stackable sub-converters, wherein a ratio of a portion of the current sharing signal generated by a master control circuit to a portion generated by one of the slave control circuits is k which relates to a difference between a total phase number and an activated phase number.
    Type: Application
    Filed: December 13, 2023
    Publication date: March 6, 2025
    Inventors: Wei-Chuan Wu, Chih-Hao Yang, Li-Wen Fang, Ting-Jung Tai
  • Patent number: 12243918
    Abstract: A device includes a gate structure, first and second gate spacers, source/drain regions, a refill metal structure, and a first dielectric liner. The gate structure is on a substrate. The first and second gate spacers are on opposite sides of the gate structure, respectively. The source/drain regions are spaced part from the gate structure at least in part by the first and second gate spacers. The refill metal structure is on the gate structure and between the first and second gate spacers. The first di electric liner is atop the gate structure. The first dielectric liner interposes the refill metal structure and the first gate spacer.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: March 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yuan-Hsiang Wu, Jia-Chuan You, Chia-Hao Chang, Kuo-Cheng Chiang, Chih-Hao Wang
  • Publication number: 20250072049
    Abstract: The present disclosure describes a semiconductor device having a dielectric structure between a source/drain (S/D) structure and a contact structure. The semiconductor device includes a S/D structure on a substrate, a dielectric structure on a top surface of the S/D structure, and a S/D contact structure on the S/D structure and the dielectric structure. A portion of the S/D contact structure is in contact with a top surface of the dielectric structure.
    Type: Application
    Filed: November 12, 2024
    Publication date: February 27, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Chien WU, Chun-Yuan CHEN, Huan-Chieh SU, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Patent number: 12237418
    Abstract: A semiconductor device includes a semiconductor layer. A gate structure is disposed over the semiconductor layer. A spacer is disposed on a sidewall of the gate structure. A height of the spacer is greater than a height of the gate structure. A liner is disposed on the gate structure and on the spacer. The spacer and the liner have different material compositions.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: February 25, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Chieh Su, Chih-Hao Wang, Kuo-Cheng Chiang, Wei-Hao Wu, Zhi-Chang Lin, Jia-Ni Yu, Yu-Ming Lin, Chung-Wei Hsu
  • Patent number: 12211871
    Abstract: The present disclosure relates to an integrated chip including a substrate and a pixel. The pixel includes a photodetector. The photodetector is in the substrate. The integrated chip further includes a first inner trench isolation structure and an outer trench isolation structure that extend into the substrate. The first inner trench isolation structure laterally surrounds the photodetector in a first closed loop. The outer trench isolation structure laterally surrounds the first inner trench isolation structure along a boundary of the pixel in a second closed loop and is laterally separated from the first inner trench isolation structure. Further, the integrated chip includes a scattering structure that is defined, at least in part, by the first inner trench isolation structure and that is configured to increase an angle at which radiation impinges on the outer trench isolation structure.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: January 28, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang
  • Publication number: 20250029949
    Abstract: A wafer stacking process is provided in the present invention, including steps of forming a silicon oxide layer on a sacrificial carrier, bonding the silicon oxide layer with a dielectric layer on a front side of a silicon substrate, performing a thinning process on the back side of the silicon substrate to expose TSVs therewithin, bonding the back side of the silicon substrate with another silicon substrate, repeating the thinning process and the process of bonding another silicon substrate above so as to form a wafer stacking structure, and performing a removing process to completely remove the sacrificial carrier.
    Type: Application
    Filed: November 1, 2023
    Publication date: January 23, 2025
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Chih-Feng Sung, Chih-Hao Chuang, Chun-Lin Lu, Shih-Ping Lee, Li-Han Chiu, Yi-Kai Wu
  • Patent number: 12205819
    Abstract: A semiconductor device includes a first transistor and a second transistor. The first transistor includes: a first source and a first drain separated by a first distance, a first semiconductor structure disposed between the first source and first drain, a first gate electrode disposed over the first semiconductor structure, and a first dielectric structure disposed over the first gate electrode. The first dielectric structure has a lower portion and an upper portion disposed over the lower portion and wider than the lower portion. The second transistor includes: a second source and a second drain separated by a second distance greater than the first distance, a second semiconductor structure disposed between the second source and second drain, a second gate electrode disposed over the second semiconductor structure, and a second dielectric structure disposed over the second gate electrode. The second dielectric structure and the first dielectric structure have different material compositions.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: January 21, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Chieh Su, Zhi-Chang Lin, Ting-Hung Hsu, Jia-Ni Yu, Wei-Hao Wu, Yu-Ming Lin, Chih-Hao Wang
  • Publication number: 20250022854
    Abstract: Provide a micro-light-emitting package includes a first substrate, a plurality of micro-light-emitting diodes (micro-LEDs), a transparent protective layer, and a plurality of conductive pads. The first substrate has an upper surface and a lower surface opposite to each other. The micro-LEDs are disposed on the upper surface of the first substrate. The micro-LEDs have a first electrode and a second electrode electrically opposite to the first electrode. The transparent protective layer covers the micro-LEDs. The plurality of conductive pads are disposed on the lower surface of the first substrate. The conductive pads include a first conductive pad, a second conductive pad, a third conductive pad, and a fourth conductive pad. The first conductive pad, the second conductive pad, the third conductive pad respectively electrically connected to the corresponding first electrode of the micro-LEDs. The fourth conductive pad is commonly electrically connected to the second electrode of the plurality of micro-LEDs.
    Type: Application
    Filed: June 18, 2024
    Publication date: January 16, 2025
    Inventors: Chih-Hao LIN, Po-Han WU, Tsung-Hao SU, Wei-Yuan MA
  • Publication number: 20240302541
    Abstract: An electronic device, including a sensing substrate, a scintillator layer, and an adjustable reflective layer, is provided. The scintillator layer is disposed on the sensing substrate. The adjustable reflective layer is disposed on the sensing substrate and includes a first electrode, a second electrode, and an electrophoretic layer. The first electrode is disposed on the scintillator layer. The second electrode is disposed on the first electrode. The electrophoretic layer is disposed between the first electrode and the second electrode. The second electrode surrounds the scintillator layer.
    Type: Application
    Filed: February 1, 2024
    Publication date: September 12, 2024
    Applicant: InnoCare Optoelectronics Corporation
    Inventors: Chih-Hao Wu, Wen-Chien Lin
  • Publication number: 20240272313
    Abstract: An electronic device, including a scintillator layer, a sensor, and a filter, is provided. The sensor overlaps the scintillator layer and includes a first sensing unit and a second sensing unit. The filter includes a first filter unit overlapping the first sensing unit and a second filter unit overlapping the second sensing unit, and the first filter unit and the second filter unit have different thicknesses.
    Type: Application
    Filed: January 2, 2024
    Publication date: August 15, 2024
    Applicant: InnoCare Optoelectronics Corporation
    Inventor: Chih-Hao Wu
  • Publication number: 20240274486
    Abstract: An electronic device is provided. The electronic device includes a substrate, an active element, a first insulation layer, and a detection element. An active element is disposed on the substrate. A first insulation layer is disposed on the active element. A detection element is disposed on the first insulation layer. The detection element comprises a lower electrode disposed on the first insulation layer, an active layer disposed on the lower electrode, an upper electrode disposed on the active layer, and the lower electrode is a part of a conductive layer. The first insulation layer has a recess, and the recess does not overlap with the conductive layer in a normal direction of the substrate.
    Type: Application
    Filed: April 24, 2024
    Publication date: August 15, 2024
    Applicant: InnoCare Optoelectronics Corporation
    Inventors: Hsin-Hung Lin, Chih-Hao Wu
  • Publication number: 20240204034
    Abstract: Disclosed is a method for manufacturing a detection panel, which includes the following steps. A first flexible board is provided, and the first flexible board has a circuit layer. A second flexible board is provided, the first flexible board is fixed on the second flexible board, and the first flexible board is disposed between the circuit layer and the second flexible board. A carrier board is provided, the carrier board is fixed on the second flexible board, and the second flexible board is disposed between the carrier board and the first flexible board. A scintillator is formed on the circuit layer. The carrier board is detached from the second flexible board. The first flexible board and the second flexible board are cut to form the detection panel.
    Type: Application
    Filed: November 7, 2023
    Publication date: June 20, 2024
    Applicant: InnoCare Optoelectronics Corporation
    Inventors: Wen-Chien Lin, Chih-Hao Wu
  • Publication number: 20240125423
    Abstract: A projection device includes a housing and a bracket assembly. The housing has a first side wall and a second side wall connected to each other, the first side wall has a connecting portion and a limit groove, the limit groove has a curved section and a linear section connected to each other. The second side wall has a projection hole. The bracket assembly includes an adapter and a bracket. The adapter is movably connected to the connecting portion. The bracket is pivotally connected to the adapter and has a limit post extending into the limit groove. When the limit post moves to the linear section, the adapter is adapted to move in the connecting portion and drives the limit post to move in the linear section, so the bracket can be closer to the projection hole and the effect of covering the projection hole by the bracket is improved.
    Type: Application
    Filed: October 13, 2023
    Publication date: April 18, 2024
    Inventors: YING ZHANG, CHIH-HAO WU, GANG LI
  • Patent number: 11960040
    Abstract: An X-ray device, including a sensor panel and a flexible scintillator structure disposed on the sensor panel, is provided. A manufacturing method of the X-ray device is also provided.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: April 16, 2024
    Assignee: InnoCare Optoelectronics Corporation
    Inventors: Wen Chien Lin, Chih-Hao Wu
  • Patent number: 11960039
    Abstract: An X ray device, including an array substrate, a scintillator layer, a first adhesion layer, a function film, and a second adhesion layer, is provided. The scintillator layer is disposed on the array substrate. The first adhesion layer is disposed between the scintillator layer and the array substrate. The function film is disposed on the array substrate. The second adhesion layer is disposed between the function film and the array substrate. The function film covers the scintillator layer.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: April 16, 2024
    Assignee: InnoCare Optoelectronics Corporation
    Inventors: Chih-Ying Wang, Chih-Hao Wu