Patents by Inventor Chih-Heng Su

Chih-Heng Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151371
    Abstract: Techniques described herein include forming respective (different) types of metal silicide layers for p-type source/drain regions and n-type source/drain regions of nanostructure transistors of a semiconductor device in a selective manner that reduces process complexity. For example, a p-type metal silicide layer may be selectively formed over a p-type source/drain region (e.g., such that the p-type metal silicide layer is not formed over the n-type source/drain region) of a first nanostructure transistor, and an n-type metal silicide layer may be formed over the n-type source/drain region (which may be selective or non-selective) of a second nanostructure transistor. This provides a low Schottky barrier height between the p-type metal silicide layer and the p-type source/drain region, as well as a low Schottky barrier height between the n-type metal silicide layer and the n-type source/drain region. This reduces the contact resistance for both p-type source/drain regions and n-type source/drain regions.
    Type: Application
    Filed: January 31, 2024
    Publication date: May 8, 2025
    Inventors: Yun Ju FAN, Lo-Heng CHANG, Huan-Chieh SU, Chih-Hao WANG
  • Patent number: 12278273
    Abstract: A semiconductor device includes a first dielectric layer, a stack of semiconductor layers disposed over the first dielectric layer, a gate structure wrapping around each of the semiconductor layers and extending lengthwise along a direction, and a dielectric fin structure and an isolation structure disposed on opposite sides of the stack of semiconductor layers and embedded in the gate structure. The dielectric fin structure has a first width along the direction smaller than a second width of the isolation structure along the direction. The isolation structure includes a second dielectric layer extending through the gate structure and the first dielectric layer, and a third dielectric layer extending through the first dielectric layer and disposed on a bottom surface of the gate structure and a sidewall of the first dielectric layer.
    Type: Grant
    Filed: November 28, 2023
    Date of Patent: April 15, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Lo-Heng Chang, Cheng-Chi Chuang, Kuan-Lun Cheng, Chih-Hao Wang
  • Publication number: 20250113565
    Abstract: Embodiments of the present disclosure provide a semiconductor device with backside source/drain contacts formed using a buried source/drain feature and a semiconductor cap layer formed between the buried source/drain feature and a source/drain region. The buried source/drain feature and the semiconductor cap layer enable self-aligned backside source/drain contact and backside isolation. The semiconductor cap layer functions as an etch stop layer during backside contact formation while enabling source/drain region growth without fabrication penalty, such as voids in the source/drain regions.
    Type: Application
    Filed: February 2, 2024
    Publication date: April 3, 2025
    Inventors: Lo-Heng CHANG, Huan-Chieh SU, Chun-Yuan CHEN, Sheng-Tsung WANG, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20250088091
    Abstract: A power converter improving input overvoltage from output voltage drop is provided. The power converter includes a high-side switch, a low-side switch, a control circuit, a voltage threshold determining circuit and a voltage drop suppression circuit. The voltage threshold determining circuit determines whether or not an output voltage of the power converter is dropping to determine or adjust a voltage threshold. The voltage drop suppression circuit detects a voltage of a first terminal of the high-side switch. When the voltage drop suppression circuit determines that the detected voltage of the first terminal of the high-side switch is higher than the voltage threshold, the voltage drop suppression circuit pulls down the voltage of the first terminal of the high-side switch.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 13, 2025
    Inventors: CHUN-KAI HSU, CHIH-HENG SU
  • Patent number: 12249913
    Abstract: An open-loop inductor current emulating circuit is provided. A current sensor circuit senses a current flowing through a first terminal of a low-side switch to output a current sensed signal. An emulation controller circuit outputs a plurality of charging current signals according to currents of a plurality of rising waveforms of the current sensed signal. The emulation controller circuit outputs a plurality of discharging current signals according to currents of a plurality of falling waveforms of the current sensed signal. A charging and discharging circuit generates a plurality of charging currents according to the charging current signals, and generates a plurality of discharging currents according to the discharging current signals. The charging and discharging circuit alternatively outputs the charging currents and the discharging currents to the capacitor to charge and discharge the capacitor multiple times, thereby achieving a purpose of emulating an inductor current.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: March 11, 2025
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chun-Kai Hsu, Chih-Heng Su
  • Publication number: 20250048710
    Abstract: An integrated circuit includes a substrate having a semiconductor layer. The integrated circuit includes a transistor. The transistor includes stacked channels above the semiconductor layer, a first source/drain region in contact with the channels, and a second source/drain region in contact with the channels. A backside source/drain contact is positioned in the substrate directly below and electrically coupled to the first source/drain region. A frontside source/drain contact is directly above and electrically coupled to the first source/drain region. A bottom semiconductor structure is positioned below the second source/drain region and in contact with the semiconductor layer.
    Type: Application
    Filed: January 12, 2024
    Publication date: February 6, 2025
    Inventors: Lo-Heng CHANG, Huan-Chieh SU, Chun-Yuan CHEN, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20250031404
    Abstract: A semiconductor device may include one or more transistor structures that include a plurality of source/drain regions and a gate structure between the source/drain regions. The semiconductor device may further include one or more dielectric layers between a source/drain contact structure and a gate structure of the one or more of the transistor structures. The one or more dielectric layers may be manufactured using on oxidation treatment process to tune the dielectric constant of the one or more dielectric layers. The dielectric constant of the one or more dielectric layers may be tuned to reduce the parasitic capacitance between the source/drain contact structure and the gate structure (which are conductive structures). In particular, the dielectric constant of the one or more spacer dielectric may be tuned using the oxidation treatment process to lower the as-deposited dielectric constant of the one or more dielectric layers.
    Type: Application
    Filed: July 21, 2023
    Publication date: January 23, 2025
    Inventors: Min-Hsuan LU, Sheng-Tsung WANG, Huan-Chieh SU, Tzu Pei CHEN, Hao-Heng LIU, Chien-Hung LIN, Chih-Hao WANG
  • Publication number: 20240283361
    Abstract: A power converter with adaptively adjustable voltages based on detected currents is provided. A current detector circuit detects values of currents flowing through a plurality of switch components multiple times. Each time when all of the detected values of the currents flowing through the plurality of switch components are normal current values, a counter counts down a reference voltage to decrease the reference voltage. When the detected value of the current flowing through any one of the plurality of switch components is an abnormal current value, the counter counts up the reference voltage to increase the reference voltage. A controller circuit controls a high-side switch and a low-side switch to operate according to the reference voltage received from the counter each time.
    Type: Application
    Filed: April 21, 2023
    Publication date: August 22, 2024
    Inventors: CHUN-KAI HSU, CHIH-HENG SU
  • Patent number: 12007273
    Abstract: A method of stabilizing data of digital signals is provided. The method includes steps of: setting a boundary coefficient; reading a piece of digital data; defining a value of the piece of digital data as a center value; outputting the value of the piece of digital data; reading a next piece of digital data; subtracting a value of the next piece of digital data from the previously outputted value to obtain a positive difference or a negative difference; and determining whether or not an absolute value of the positive or negative difference is larger than the boundary coefficient, if not, outputting the center value, if yes, updating the center value such that the updated center value is equal to the value of the next piece of digital data, and outputting the updated center value.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: June 11, 2024
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Jia-Hua Hong, Chih-Heng Su
  • Publication number: 20240171075
    Abstract: A buck converter using an ultra-low working current is provided. An error amplifier amplifies a difference between a voltage of an output terminal of the buck converter and a reference voltage to output an error amplified signal. A comparator compares a voltage of the error amplified signal with a ramp voltage to output a comparison signal. A control circuit controls a driver circuit to drive a high-side switch and a low-side switch according to the comparison signal. When the buck converter does not enter an ultra-low current mode, a low current controller circuit controls a system circuit to obtain an input current from an input power source. When the buck converter enters the ultra-low current mode, the low current controller circuit controls the system circuit to stop obtaining the input current from the input power source.
    Type: Application
    Filed: February 23, 2023
    Publication date: May 23, 2024
    Inventors: YI-CHUAN LU, CHIH-HENG SU
  • Patent number: 11958413
    Abstract: A foreign object detecting system and a method are provided. A control circuit controls a light transmitter and a light receiver. The light transmitter is disposed adjacent to a detected object and emits a light signal toward the detected object. The light receiver is disposed adjacent to the detected object in a path along which the light signal reflected by the detected object travels. The light receiver receives the light signal reflected to the light receiver. In a pre-operation, the control circuit defines the light signal received by the light receiver when the foreign object is not on the detected object as a first reflected light signal. In a detection operation, the control circuit determines that a difference exists between the light signal currently received by the light receiver and the first reflected light signal, the control circuit determines that the foreign object is on the detected object.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: April 16, 2024
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Yi-Chuan Lu, Chih-Heng Su
  • Publication number: 20240097569
    Abstract: An open-loop inductor current emulating circuit is provided. A current sensor circuit senses a current flowing through a first terminal of a low-side switch to output a current sensed signal. An emulation controller circuit outputs a plurality of charging current signals according to currents of a plurality of rising waveforms of the current sensed signal. The emulation controller circuit outputs a plurality of discharging current signals according to currents of a plurality of falling waveforms of the current sensed signal. A charging and discharging circuit generates a plurality of charging currents according to the charging current signals, and generates a plurality of discharging currents according to the discharging current signals. The charging and discharging circuit alternatively outputs the charging currents and the discharging currents to the capacitor to charge and discharge the capacitor multiple times, thereby achieving a purpose of emulating an inductor current.
    Type: Application
    Filed: November 21, 2022
    Publication date: March 21, 2024
    Inventors: CHUN-KAI HSU, CHIH-HENG SU
  • Publication number: 20230369868
    Abstract: A switching charger for supplying stable power is provided. First input terminals of first and fourth operational amplifiers and a second input terminal of a second operational amplifier are connected to a battery. A second input terminal of the first operational amplifier is coupled to a reference voltage. A first input terminal of the second operational amplifier and a second input terminal of the fourth operational amplifier are connected to an inductor. A first input terminal of a third operational amplifier is connected to an input power source. A second input terminal of the third operational amplifier is connected to a system circuit. A first selector circuit is connected to output terminals of the third and fourth operational amplifiers. A second selector circuit is connected to output terminals of the first and second operational amplifiers and the first selector circuit.
    Type: Application
    Filed: July 19, 2022
    Publication date: November 16, 2023
    Inventors: CHUN-KAI HSU, CHIH-HENG SU, CHIH-NING CHEN
  • Patent number: 11799473
    Abstract: A closed-loop inductor current emulating circuit is provided. An emulation controller circuit generates an emulating signal according to a current flowing through a first terminal of a low-side switch of a power converter. When the emulation controller circuit outputs the emulating signal to a charging and discharging circuit, the charging and discharging circuit outputs a charging and discharging signal to a first terminal of a capacitor according to the emulating signal. When the emulation controller circuit outputs the emulating signal to a control terminal of the capacitor to adjust a capacitance of the capacitor, the charging and discharging circuit outputs a charging and discharging signal to the first terminal of the capacitor according to one or both of an input voltage and an output voltage of the power converter.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: October 24, 2023
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chun-Kai Hsu, Chih-Heng Su
  • Publication number: 20230297155
    Abstract: A power saving system of a battery charger is provided. A control terminal of a first transistor receives a wake-up signal. A counter is connected to a first terminal of the first transistor. The counter determines whether or not a working period of the wake-up signal from the first transistor is larger than a time threshold to output a counting signal. When the counting signal indicates that the working period of the wake-up signal is not larger than the time threshold, the counter and electronic components of an electronic device are turned off, thereby saving power of a battery. When the counting signal indicates that the working period of the wake-up signal is larger than the time threshold, the electronic device is switched from a power saving mode to a normal operation mode. In the normal operation mode, the battery can supply power to the electronic device.
    Type: Application
    Filed: June 6, 2022
    Publication date: September 21, 2023
    Inventors: CHIH-NING CHEN, CHIH-HENG SU
  • Patent number: 11755092
    Abstract: A power saving system of a battery charger is provided. A control terminal of a first transistor receives a wake-up signal. A counter is connected to a first terminal of the first transistor. The counter determines whether or not a working period of the wake-up signal from the first transistor is larger than a time threshold to output a counting signal. When the counting signal indicates that the working period of the wake-up signal is not larger than the time threshold, the counter and electronic components of an electronic device are turned off, thereby saving power of a battery. When the counting signal indicates that the working period of the wake-up signal is larger than the time threshold, the electronic device is switched from a power saving mode to a normal operation mode. In the normal operation mode, the battery can supply power to the electronic device.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: September 12, 2023
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chih-Ning Chen, Chih-Heng Su
  • Publication number: 20230283097
    Abstract: A switching charger for accurately sensing a small current is provided. First terminals of first transistors and a second transistor are coupled to a system voltage. Second terminals of the first transistors and a first input terminal of an operational amplifier are connected to a battery. A first terminal of a third transistor is connected to a second terminal of the second transistor and a second input terminal of the operational amplifier. A control terminal of the third transistor is connected to an output terminal of the operational amplifier. A first terminal of a fourth transistor is connected to a second terminal of the third transistor. First terminals of fifth transistors are coupled to an input voltage. Control terminals of the first transistors and the fifth transistors are connected to a control circuit. First terminals of sixth transistors are respectively connected to second terminals of the fifth transistors.
    Type: Application
    Filed: August 23, 2022
    Publication date: September 7, 2023
    Inventors: CHIH-NING CHEN, CHIH-HENG SU
  • Patent number: 11515791
    Abstract: A transient response improving system and method with a prediction mechanism of an error amplified signal are provided. A current sensor circuit senses a current flowing through a first resistor connected between an adapter and an electronic device. When the current is larger than a current threshold, a predicting circuit calculates a target voltage level based on a common voltage and a voltage of the battery and instantly pulls up or down a voltage level of the error amplified signal to the target voltage level. A comparator compares the error amplified signal with a ramp signal to output a comparison signal. A controller circuit controls a driver circuit to switch a high-side switch and a low-side switch according to the comparison signal.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: November 29, 2022
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventors: Chun-Kai Hsu, Chih-Heng Su
  • Publication number: 20220333983
    Abstract: A method of stabilizing data of digital signals is provided. The method includes steps of: setting a boundary coefficient; reading a piece of digital data; defining a value of the piece of digital data as a center value; outputting the value of the piece of digital data; reading a next piece of digital data; subtracting a value of the next piece of digital data from the previously outputted value to obtain a positive difference or a negative difference; and determining whether or not an absolute value of the positive or negative difference is larger than the boundary coefficient, if not, outputting the center value, if yes, updating the center value such that the updated center value is equal to the value of the next piece of digital data, and outputting the updated center value.
    Type: Application
    Filed: August 3, 2021
    Publication date: October 20, 2022
    Inventors: Jia-Hua Hong, CHIH-HENG SU
  • Publication number: 20220271666
    Abstract: A transient response improving system and method with a prediction mechanism of an error amplified signal are provided. A current sensor circuit senses a current flowing through a first resistor connected between an adapter and an electronic device. When the current is larger than a current threshold, a predicting circuit calculates a target voltage level based on a common voltage and a voltage of the battery and instantly pulls up or down a voltage level of the error amplified signal to the target voltage level. A comparator compares the error amplified signal with a ramp signal to output a comparison signal. A controller circuit controls a driver circuit to switch a high-side switch and a low-side switch according to the comparison signal.
    Type: Application
    Filed: June 30, 2021
    Publication date: August 25, 2022
    Inventors: CHUN-KAI HSU, CHIH-HENG SU