Abstract: A current detection circuit includes a first detection circuit, a second detection circuit, and a control selection circuit. The first detection circuit electrically connects between an input terminal and an output terminal and outputs a first detection signal. The second detection circuit electrically connects between the input terminal and the output terminal and outputs a second detection signal. The control selection circuit electrically connects the output terminal, the first detection circuit, and the second detection circuit and selects one of the first and second detection signals as a detection signal.

Abstract: A current detection circuit includes a first detection circuit, a second detection circuit, and a control selection circuit. The first detection circuit electrically connects between an input terminal and an output terminal and outputs a first detection signal. The second detection circuit electrically connects between the input terminal and the output terminal and outputs a second detection signal. The control selection circuit electrically connects the output terminal, the first detection circuit, and the second detection circuit and selects one of the first and second detection signals as a detection signal.

Abstract: A frequency multiplier according to the present invention comprises a period-to-voltage converter that generates a control signal in response to the period of an input signal. An oscillator generates an output signal in accordance with the control signal. The level of the control signal is corrected to the frequency of the input signal. The control signal is coupled to determine the frequency of the output signal.

Abstract: A switching controller for a parallel power supply is disclosed. The switching controller includes an input circuit coupled to an input terminal to receive an input signal for generating a phase-shift signal, a first integration circuit coupled to the input circuit to generate a first integration signal in response to a pulse width of the input signal, and a control circuit coupled to the first integration circuit to generate a switching signal for switching the power supply, the switching signal being enabled in response to the phase-shift signal, a pulse width of the switching signal being determined in accordance with the first integration signal.

Abstract: A low dropout (LDO) regulator operates in wide input range. The LDO includes an N-type pass transistor and a P-type pass transistor for supplying power to the output terminal. The P-type pass transistor is connected with N-type pass transistor in parallel. Two error amplifiers control the gate terminals of the N-type pass transistor and P-type pass transistor to generate a first output voltage and a second output voltage. Thus, the first output voltage is generated when the input voltage is higher than a threshold voltage, and the second output voltage is generated when the input voltage is lower than the threshold voltage.

Abstract: A switching controller for a parallel power supply is disclosed. The switching controller includes an input circuit coupled to an input terminal to receive an input signal for generating a phase-shift signal, a first integration circuit coupled to the input circuit to generate a first integration signal in response to a pulse width of the input signal, and a control circuit coupled to the first integration circuit to generate a switching signal for switching the power supply, the switching signal being enabled in response to the phase-shift signal, a pulse width of the switching signal being determined in accordance with the first integration signal.

Abstract: A low dropout (LDO) regulator operates in wide input range. The LDO includes an N-type pass transistor and a P-type pass transistor for supplying power to the output terminal. The P-type pass transistor is connected with N-type pass transistor in parallel. Two error amplifiers control the gate terminals of the N-type pass transistor and P-type pass transistor to generate a first output voltage and a second output voltage. Thus, the first output voltage is generated when the input voltage is higher than a threshold voltage, and the second output voltage is generated when the input voltage is lower than the threshold voltage.