Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A high voltage transistor structure including a substrate, a first isolation structure, a second isolation structure, a gate structure, a first source and drain region, and a second source and drain region is provided. The first isolation structure and the second isolation structure are disposed in the substrate. The gate structure is disposed on the substrate, at least a portion of the first isolation structure, and at least a portion of the second isolation structure. The first source and drain region and the second source and drain region are located in the substrate on two sides of the first isolation structure and the second isolation structure. The depth of the first isolation structure is greater than the depth of the second isolation structure.

Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, a fourth repeating unit, and a fifth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), the fourth repeating unit has a structure of Formula (IV), and the fifth repeating unit has a structure of Formula (V), a structure of Formula (VI), or a structure of Formula (VII) wherein A1, A2, A3, A4, X1, Z1, R1, R2, R3 and Q are as defined in the specification.

Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.

Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, and a fourth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), and the fourth repeating unit has a structure of Formula (IV), a structure of Formula (V) or a structure of Formula (VI) wherein A1, A2, A3, Z1, R1, R2, R3 and Q are as defined in the specification.

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: A dual-processor system includes a power supply, a temporary memory, a non-volatile memory and two processors. The non-volatile memory stores an initialization program code, a first configuration file corresponding to a first operating system, and a second configuration file corresponding to a second operating system. Compared to the first operating system, the second operating system has a shorter interrupt latency and a shorter thread switching latency. After the power supply starts to supply power, the first processor executes the initialization program code to perform operations of initializing the temporary memory, loading the second configuration file into the temporary memory, notifying the second processor to fetch the second configuration file from the temporary buffer, loading the first configuration rile into the temporary memory and establishing the first operating system according to the first configuration file.

Abstract: A synchronization rectification device is connected with a secondary side of a transformer of a power supply and an output capacitor. The synchronization rectification device includes a rectification switch, a voltage-controlled switch module and a rectification controller. The rectification switch is connected between the secondary side and the output capacitor. The voltage-controlled switch module connected with the secondary side has a voltage-division capacitor and receives a secondary voltage generated by the secondary side. The rectification controller is connected with the rectification switch and the voltage-controlled switch module. When the secondary voltage rises to a switching voltage value below a first voltage value, the rectification controller controls the rectification switch to be turned off. After the rectification switch is turned off, the voltage-controlled switch module is turned off, and the voltage-division capacitor receives the secondary voltage.

Abstract: A motor includes a stator coil, a rotor and a driving unit. The stator coil is configured to be electrified to generate a magnetic force. The rotor is rotatably coupled with the stator coil and includes a magnetic member facing the stator coil. The driving unit is electrically connected to the stator coil and outputs a driving signal to the stator coil. An electrical characteristic value of the driving signal increases in a gradual manner. The rotor outputs a motive power that is gradually increased during a process the rotor rotates from an electric angle back to a same electric angle. In addition, an activation control method for the motor and a fan are also disclosed.

Abstract: A dual-processor system includes a power supply, a temporary memory, a non-volatile memory and two processors. The non-volatile memory stores an initialization program code, a first configuration file corresponding to a first operating system, and a second configuration file corresponding to a second operating system. Compared to the first operating system, the second operating system has a shorter interrupt latency and a shorter thread switching latency. After the power supply starts to supply power, the first processor executes the initialization program code to perform operations of initializing the temporary memory, loading the second configuration file into the temporary memory, notifying the second processor to fetch the second configuration file from the temporary buffer, loading the first configuration rile into the temporary memory and establishing the first operating system according to the first configuration file.