Patents by Inventor CHIH-HSIANG FAN
CHIH-HSIANG FAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11961768Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.Type: GrantFiled: May 5, 2023Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Yu-Sheng Wang, Chih-Hsiang Fan, Kun-Wa Kuok
-
Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
-
Publication number: 20230282482Abstract: A method of manufacturing a semiconductor device includes forming a gate trench over a semiconductor substrate, depositing a gate dielectric layer and a work function layer in the gate trench, depositing a capping layer over the work function layer, passivating a surface portion of the capping layer to form a passivation layer, removing the passivation layer, depositing a fill layer in the gate trench, recessing the fill layer and the capping layer, and forming a contact metal layer above the capping layer in the gate trench.Type: ApplicationFiled: June 4, 2022Publication date: September 7, 2023Inventors: Tsung-Han Shen, Kevin Chang, Yu-Ming Li, Chih-Hsiang Fan, Yi-Ting Wang, Wei-Chin Lee, Hsien-Ming Lee, Chien-Hao Chen, Chi On Chui
-
Publication number: 20230274983Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.Type: ApplicationFiled: May 5, 2023Publication date: August 31, 2023Inventors: Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Yu-Sheng Wang, Chih-Hsiang Fan, Kun-Wa Kuok
-
Publication number: 20230231037Abstract: A method of forming a semiconductor device includes: forming a dummy gate over a fin, where the fin protrudes above a substrate; surrounding the dummy gate with a dielectric material; and replacing the dummy gate with a replacement gate structure, where replacing the dummy gate includes: forming a gate trench in the dielectric material, where forming the gate trench includes removing the dummy gate; forming a metal-gate stack in the gate trench, where forming the metal-gate stack includes forming a gate dielectric layer, a first work function layer, and a gap-filling material sequentially in the gate trench; and enlarging a volume of the gap-filling material in the gate trench.Type: ApplicationFiled: March 20, 2023Publication date: July 20, 2023Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chih-Hsiang Fan, Tsung-Han Shen, Jia-Ming Lin, Wei-Chin Lee, Hsien-Ming Lee, Chi On Chui
-
Patent number: 11682589Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.Type: GrantFiled: October 12, 2020Date of Patent: June 20, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Yu-Sheng Wang, Chih-Hsiang Fan, Kun-Wa Kuok
-
Patent number: 11610982Abstract: A method of forming a semiconductor device includes: forming a dummy gate over a fin, where the fin protrudes above a substrate; surrounding the dummy gate with a dielectric material; and replacing the dummy gate with a replacement gate structure, where replacing the dummy gate includes: forming a gate trench in the dielectric material, where forming the gate trench includes removing the dummy gate; forming a metal-gate stack in the gate trench, where forming the metal-gate stack includes forming a gate dielectric layer, a first work function layer, and a gap-filling material sequentially in the gate trench; and enlarging a volume of the gap-filling material in the gate trench.Type: GrantFiled: January 4, 2021Date of Patent: March 21, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chih-Hsiang Fan, Tsung-Han Shen, Jia-Ming Lin, Wei-Chin Lee, Hsien-Ming Lee, Chi On Chui
-
Publication number: 20220085187Abstract: A method of forming a semiconductor device includes: forming a dummy gate over a fin, where the fin protrudes above a substrate; surrounding the dummy gate with a dielectric material; and replacing the dummy gate with a replacement gate structure, where replacing the dummy gate includes: forming a gate trench in the dielectric material, where forming the gate trench includes removing the dummy gate; forming a metal-gate stack in the gate trench, where forming the metal-gate stack includes forming a gate dielectric layer, a first work function layer, and a gap-filling material sequentially in the gate trench; and enlarging a volume of the gap-filling material in the gate trench.Type: ApplicationFiled: January 4, 2021Publication date: March 17, 2022Inventors: Chih-Hsiang Fan, Tsung-Han Shen, Jia-Ming Lin, Wei-Chin Lee, Hsien-Ming Lee, Chi On Chui
-
Publication number: 20210043521Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.Type: ApplicationFiled: October 12, 2020Publication date: February 11, 2021Inventors: Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Yu-Sheng Wang, Chih-Hsiang Fan, Kun-Wa Kuok
-
Patent number: 10804161Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.Type: GrantFiled: November 3, 2017Date of Patent: October 13, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Yu-Sheng Wang, Chih-Hsiang Fan, Kun-Wa Kuok
-
Patent number: 10515807Abstract: Methods of fabricating semiconductor devices are provided. The method includes forming a gate dielectric layer over a substrate. The method also includes depositing a first p-type work function tuning layer over the gate dielectric layer using a first atomic layer deposition (ALD) process with an inorganic precursor. The method further includes forming a second p-type work function tuning layer on the first p-type work function tuning layer using a second atomic layer deposition (ALD) process with an organic precursor. In addition, the method includes forming an n-type work function metal layer over the second p-type work function tuning layer.Type: GrantFiled: June 14, 2018Date of Patent: December 24, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jui-Fen Chien, Chih-Hsiang Fan, Hsiao-Kuan Wei, Pohan Kung, Hsien-Ming Lee
-
Publication number: 20190385855Abstract: Methods of fabricating semiconductor devices are provided. The method includes forming a gate dielectric layer over a substrate. The method also includes depositing a first p-type work function tuning layer over the gate dielectric layer using a first atomic layer deposition (ALD) process with an inorganic precursor. The method further includes forming a second p-type work function tuning layer on the first p-type work function tuning layer using a second atomic layer deposition (ALD) process with an organic precursor. In addition, the method includes forming an n-type work function metal layer over the second p-type work function tuning layer.Type: ApplicationFiled: June 14, 2018Publication date: December 19, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Jui-Fen CHIEN, Chih-Hsiang FAN, Hsiao-Kuan WEI, Pohan KUNG, Hsien-Ming LEE
-
Publication number: 20180174922Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.Type: ApplicationFiled: November 3, 2017Publication date: June 21, 2018Inventors: Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Yu-Sheng Wang, Chih-Hsiang Fan, Kun-Wa Kuok
-
Patent number: 9898055Abstract: A data storage device securing mechanism includes a rack and a securing module. The rack includes a shell and two side plates connected to the ends of the shell. The securing module includes a slidable bracket on the rack and a magnetic latching member. The bracket includes two magnets of opposing poles against two magnetic blocks, and the latching member is rotatably installed on the side plate. When the bracket is slid in the rack, the two magnetic blocks are displaced adjacent to the latching member, to attract or to repel the latching member. The latching member is thereby rotated to approach or to move away from the side plate.Type: GrantFiled: December 18, 2016Date of Patent: February 20, 2018Assignees: NANNING FUGUI PRECISION INDUSTRIAL CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventor: Chih-Hsiang Fan
-
Patent number: 9614307Abstract: A connector in an electronic device includes a case, a supporting element, and an elastic element. The case defines a through hole and a plurality of latching portions protruding from an inner surface of the case surrounding the through hole. The latching portions include an engaging surface and a guiding surface adjacent to the engaging surface. The supporting element is partially received in the through hole. The supporting element includes terminal recesses and resisting pieces engaging with the engaging surface. The elastic element is partially received in the supporting element and supplied a resilient force. When the supporting element is moved away from the case, the resisting piece is separated from the engaging surface to make contact with the guiding surface under the resilient force. If reassembly of the connector contacts is not in the predetermined order the electronic device will be locked down.Type: GrantFiled: August 19, 2015Date of Patent: April 4, 2017Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Chih-Hsiang Fan, Ying-Jui Huang
-
Patent number: 9383785Abstract: A fixing element for hard disk drive includes a frame and a hard disk. The frame includes a bottom plate, a front plate, a rear plate and a side plate. The front plate has a flange extending horizontally and backwardly from the front plate. A first elastic element is formed on a bottom of the flange. A second elastic element is located at the bottom plate in a position directly under the first elastic element. The supporting element defines an engaging groove at rear ends thereof. The engaging groove engages with a position element secured to the frame, the first elastic element is abutting an upper surface of the supporting element, and the second elastic element is abutting a bottom surface of the supporting element.Type: GrantFiled: May 16, 2013Date of Patent: July 5, 2016Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: Chih-Hsiang Fan
-
Publication number: 20160066444Abstract: A connector in an electronic device includes a case, a supporting element, and an elastic element. The case defines a through hole and a plurality of latching portions protruding from an inner surface of the case surrounding the through hole. The latching portions include an engaging surface and a guiding surface adjacent to the engaging surface. The supporting element is partially received in the through hole. The supporting element includes terminal recesses and resisting pieces engaging with the engaging surface. The elastic element is partially received in the supporting element and supplied a resilient force. When the supporting element is moved away from the case, the resisting piece is separated from the engaging surface to make contact with the guiding surface under the resilient force. If reassembly of the connector contacts is not in the predetermined order the electronic device will be locked down.Type: ApplicationFiled: August 19, 2015Publication date: March 3, 2016Inventors: CHIH-HSIANG FAN, YING-JUI HUANG
-
Patent number: 9152189Abstract: A locking mechanism is used to lock a removable electronic device on a housing structure including a pair of resisting portions. The locking mechanism includes a pair of bar members, a pair of elastic elements and an operating member. Each of the pair of bar members includes a blocking portion to engage with the corresponding resisting portion and a matching portion. The pair of elastic elements is elastically connected between the electronic device and the corresponding bar members. The operating member located between the pair of bar members and defines a first groove and a second groove respectively engaging with the matching portions.Type: GrantFiled: June 13, 2011Date of Patent: October 6, 2015Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: Chih-Hsiang Fan
-
Publication number: 20140312197Abstract: A fixing element for hard disk drive includes a frame and a hard disk. The frame includes a bottom plate, a front plate, a rear plate and a side plate. The front plate has a flange extending horizontally and backwardly from the front plate. A first elastic element is formed on a bottom of the flange. A second elastic element is located at the bottom plate in a position directly under the first elastic element. The supporting element defines an engaging groove at rear ends thereof. The engaging groove engages with a position element secured to the frame, the first elastic element is abutting an upper surface of the supporting element, and the second elastic element is abutting a bottom surface of the supporting element.Type: ApplicationFiled: May 16, 2013Publication date: October 23, 2014Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: CHIH-HSIANG FAN
-
Publication number: 20120213577Abstract: A locking mechanism is used to lock a removable electronic device on a housing structure including a pair of resisting portions. The locking mechanism includes a pair of bar members, a pair of elastic elements and an operating member. Each of the pair of bar members includes a blocking portion to engage with the corresponding resisting portion and a matching portion. The pair of elastic elements is elastically connected between the electronic device and the corresponding bar members. The operating member located between the pair of bar members and defines a first groove and a second groove respectively engaging with the matching portions.Type: ApplicationFiled: June 13, 2011Publication date: August 23, 2012Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: CHIH-HSIANG FAN