Patents by Inventor Chih-Hsiang Lai

Chih-Hsiang Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147376
    Abstract: Apparatus and methods are provided for thermal throttling for UE configured with multi-panel transceiving on FR2. In one novel aspect, the UE prioritizes throttling actions based on signal qualities of each transceiving panel. In one embodiment, the switching to the target panel from the active panel is selected as the highest priority throttling action when the signal quality of the target panel is similar to the active panel. In another embodiment, the UE further determines if the quality of the target panel is sufficient to support mmW transceiving before switching to the target panel. In one embodiment, the UE reduces one or more antennae of an active panel when the signal quality difference between the active panel and the target panel is bigger than a predefined gap threshold.
    Type: Application
    Filed: September 22, 2023
    Publication date: May 2, 2024
    Inventors: Chih-Chieh Lai, Feng-Wen Weng, Yu-Hung Huang, Chi-Hsiang Lin
  • Publication number: 20240128666
    Abstract: A motherboard includes a circuit board and a connector mounted on the circuit board. The connector comprises a socket and a latch pivotally mounted on one end of the socket. The latch comprises a body, a pressing member connected to one side of the body and extending outward from one side of the body to the outside of the socket, exposing an area from a side of the interface card for finger pressing. The supporting member is connected to another side of the body, and when the pressing member is pressed, it drives the body to pivot and causes the pushing portion to lift the interface card, and the supporting member stop the body from pivoting by resting against the circuit board.
    Type: Application
    Filed: September 22, 2023
    Publication date: April 18, 2024
    Inventors: CHIH-MING LAI, YUNG-SHUN KAO, TZU-HSIANG HUANG
  • Patent number: 11961951
    Abstract: A light emitting diode device includes a substrate, a conductive via, first and second conductive pads, a driving chip, a flat layer, a redistribution layer, a light emitting diode, and an encapsulating layer. The substrate has a first surface and a second surface opposite thereto. The conductive via penetrates from the first surface to the second surface. The first and second conductive pads are respectively disposed on the first and second surface and in contact with the conductive via. The driving chip is disposed on the first surface. The flat layer is disposed over the first surface and covers the driving chip and the first conductive pad. The redistribution layer is disposed on the flat layer and electrically connects to the driving chip. The light emitting diode is flip-chip bonded to the redistribution layer. The encapsulating layer covers the redistribution layer and the light emitting diode.
    Type: Grant
    Filed: July 22, 2021
    Date of Patent: April 16, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Chih-Hao Lin, Jian-Chin Liang, Shih-Lun Lai, Jo-Hsiang Chen
  • Patent number: 11949056
    Abstract: The light emitting diode packaging structure includes a flexible substrate, a first adhesive layer, micro light emitting elements, a conductive pad, a redistribution layer, and an electrode pad. The first adhesive layer is disposed on the flexible substrate. The micro light emitting elements are disposed on the first adhesive layer and have a first surface facing to the first adhesive layer and an opposing second surface. The micro light emitting elements include a red micro light emitting element, a blue micro light emitting element, and a green micro light emitting element. The conductive pad is disposed on the second surface of the micro light emitting element. The redistribution layer covers the micro light emitting elements and the conductive pad. The electrode pad is disposed on the redistribution layer and is electrically connected to the circuit layer. A thickness of the flexible substrate is less than 100 um.
    Type: Grant
    Filed: April 20, 2023
    Date of Patent: April 2, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Chih-Hao Lin, Jo-Hsiang Chen, Shih-Lun Lai, Min-Che Tsai, Jian-Chin Liang
  • Patent number: 11948497
    Abstract: A display device includes a plurality of sub-pixels. The sub-pixels include a first sub-pixel and a second sub-pixel. The first sub-pixel includes a first light emitting element and a first control circuit. The first control circuit is configured to provide a first driving current to the first light emitting element. The second sub-pixel includes a second light emitting element and a second control circuit. The second control circuit is configured to provide a second driving current to the second light emitting element. The first control circuit and the second control circuit are configured to differently control pulse amplitude of the first driving current and pulse amplitude of the second driving current, such that both of the first light emitting element and the second light emitting element emit at a target wavelength or a color point range (e.g. +/?1.5˜2 nm).
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 2, 2024
    Assignee: Lextar Electronics Corporation
    Inventors: Chih-Hao Lin, Chien-Nan Yeh, Jo-Hsiang Chen, Shih-Lun Lai
  • Patent number: 11499966
    Abstract: A digitally encoded microflake includes a polymer layer, which has a top surface and a bottom surface substantially parallel to the top surface. At least one of the top surface and the bottom surface is to be coupled to target-specific probes for bonding with a target analyte. The microflake is identified by a binary sequence of bits encoded by an edge outline on a plane substantially parallel to the top surface and the bottom surface. The bits in the binary sequence are encoded at respective predefined locations surrounding the edge outline.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: November 15, 2022
    Assignee: WinMEMS Technologies Co., Ltd.
    Inventors: Chih-Hsiang Lai, Wen-Ching Lai
  • Publication number: 20220276236
    Abstract: A digitally encoded microflake includes a polymer layer, which has a top surface and a bottom surface substantially parallel to the top surface. At least one of the top surface and the bottom surface is to be coupled to target-specific probes for bonding with a target analyte. The microflake is identified by a binary sequence of bits encoded by an edge outline on a plane substantially parallel to the top surface and the bottom surface. The bits in the binary sequence are encoded at respective predefined locations surrounding the edge outline.
    Type: Application
    Filed: May 12, 2022
    Publication date: September 1, 2022
    Inventors: Chih-Hsiang LAI, Wen-Ching LAI
  • Patent number: 11366109
    Abstract: A digitally encoded microflake includes a polymer layer, which has a top surface and a bottom surface substantially parallel to the top surface. At least one of the top surface and the bottom surface is to be coupled to target-specific probes for bonding with a target analyte. The microflake is identified by a binary sequence of bits encoded by an edge outline on a plane substantially parallel to the top surface and the bottom surface. The bits in the binary sequence are encoded at respective predefined locations surrounding the edge outline.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: June 21, 2022
    Assignee: WinMEMS Technologies Co., Ltd.
    Inventors: Chih-Hsiang Lai, Wen-Ching Lai
  • Publication number: 20200182867
    Abstract: A digitally encoded microflake includes a polymer layer, which has a top surface and a bottom surface substantially parallel to the top surface. At least one of the top surface and the bottom surface is to be coupled to target-specific probes for bonding with a target analyte. The microflake is identified by a binary sequence of bits encoded by an edge outline on a plane substantially parallel to the top surface and the bottom surface. The bits in the binary sequence are encoded at respective predefined locations surrounding the edge outline.
    Type: Application
    Filed: October 15, 2019
    Publication date: June 11, 2020
    Inventors: Chih-Hsiang LAI, Wen-Ching LAI
  • Publication number: 20090144970
    Abstract: A method for fabricating a micro-electro-mechanical system (MEMS) device. The method comprises fabricating a MEMS part on a substrate, and detaching the MEMS part from the substrate. After detaching the MEMS part from the substrate, attaching the MEMS part to an application platform.
    Type: Application
    Filed: December 6, 2007
    Publication date: June 11, 2009
    Inventors: Tseng-Yang Hsu, Chih-Hsiang Lai
  • Patent number: 5780971
    Abstract: Method and apparatus for generating radiation of high power, variable duration and broad tunability over several orders of magnitude from a laser-ionized gas-filled capacitor array. The method and apparatus convert a DC electric field pattern into a coherent electromagnetic wave train when a relativistic ionization front passes between the capacitor plates. The frequency and duration of the radiation is controlled by the gas pressure and capacitor spacing.
    Type: Grant
    Filed: June 6, 1994
    Date of Patent: July 14, 1998
    Assignees: Univ. of So. Calif., The Regents of the Univ. Univ. of Calif.
    Inventors: John M. Dawson, Warren B. Mori, Chih-Hsiang Lai, Thomas C. Katsouleas