Patents by Inventor Chih-Hsiang Lin

Chih-Hsiang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250046655
    Abstract: A method includes finding a first plurality of through-silicon vias from a first layout of a wafer, and finding a second plurality of through-silicon vias from the first plurality of through-silicon vias. The second plurality of through-silicon vias are connected in parallel. The second plurality of through-silicon vias are merged into a large through-silicon via to generate a second layout of the wafer.
    Type: Application
    Filed: November 30, 2023
    Publication date: February 6, 2025
    Inventors: Chao Yi Lin, Kuo-Yen Liu, Chih-Hsiang Yao
  • Patent number: 12218082
    Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.
    Type: Grant
    Filed: November 9, 2023
    Date of Patent: February 4, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 12218282
    Abstract: A light-emitting device includes a first semiconductor layer; a semiconductor pillar formed on the first semiconductor layer, including a second semiconductor layer and an active layer, wherein the semiconductor pillar comprises an outmost periphery; a first contact layer formed on the first semiconductor layer and including a first contact portion and a first extending portion, wherein the first extending portion continuously surrounds an entirety of the outmost periphery of the semiconductor pillar and the first contact portion; a second contact layer formed on the second semiconductor layer; a first insulating layer including multiple first openings exposing the first contact layer and multiple second openings exposing the second contact layer; a first electrode contact layer connected to the first contact portion through the multiple first openings and covering all of the first contact layer; a second electrode contact layer connected to the second contact layer through the multiple second openings.
    Type: Grant
    Filed: December 29, 2022
    Date of Patent: February 4, 2025
    Assignee: EPISTAR CORPORATION
    Inventors: Aurelien Gauthier-Brun, Chao-Hsing Chen, Chang-Tai Hsaio, Chih-Hao Chen, Chi-Shiang Hsu, Jia-Kuen Wang, Yung-Hsiang Lin
  • Publication number: 20250040213
    Abstract: A semiconductor structure includes a source/drain feature in the semiconductor layer. The semiconductor structure includes a dielectric layer over the source/drain feature. The semiconductor structure includes a silicide layer over the source/drain feature. The semiconductor structure includes a barrier layer over the silicide layer. The semiconductor structure includes a seed layer over the barrier layer. The semiconductor structure includes a metal layer between a sidewall of the seed layer and a sidewall of the dielectric layer, a sidewall of each of the silicide layer, the barrier layer, and the metal layer directly contacting the sidewall of the dielectric layer. The semiconductor structure includes a source/drain contact over the seed layer.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Yi-Hsiang Chao, Peng-Hao Hsu, Yu-Shiuan Wang, Chi-Yuan Chen, Yu-Hsiang Liao, Chun-Hsien Huang, Hung-Chang Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 12211915
    Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: January 28, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih
  • Patent number: 12211751
    Abstract: A semiconductor device includes a single diffusion break (SDB) structure dividing a fin-shaped structure into a first portion and a second portion, an isolation structure on the SDB structure, a first spacer adjacent to the isolation structure, a metal gate adjacent to the isolation structure, a shallow trench isolation (STI around the fin-shaped structure, and a second isolation structure on the STI. Preferably, a top surface of the first spacer is lower than a top surface of the isolation structure and a bottom surface of the first spacer is lower than a bottom surface of the metal gate.
    Type: Grant
    Filed: December 28, 2023
    Date of Patent: January 28, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Kai Hsu, Ssu-I Fu, Chun-Ya Chiu, Chi-Ting Wu, Chin-Hung Chen, Yu-Hsiang Lin
  • Patent number: 12213297
    Abstract: A method comprises forming a first fin including alternating first channel layers and first sacrificial layers and a second fin including alternating second channel layers and second sacrificial layers, forming a capping layer over the first and the second fin, forming a dummy gate stack over the capping layer, forming source/drain (S/D) features in the first and the second fin, removing the dummy gate stack to form a gate trench, removing the first sacrificial layers and the capping layer over the first fin to form first gaps, removing the capping layer over the second fin and portions of the second sacrificial layers to from second gaps, where remaining portions of the second sacrificial layers and the capping layers form a threshold voltage (Vt) modulation layer, and forming a metal gate stack in the gate trench, the first gaps, and the second gaps.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Hao Lin, Chih-Hsiang Huang, Shang-Rong Li, Chih-Chuan Yang, Jui-Lin Chen, Ming-Shuan Li
  • Publication number: 20250027998
    Abstract: An electronic device and a battery power displaying method of the electronic device are provided. The method includes following steps. Estimated power of a battery module in the electronic device is obtained. A slope parameter is adjusted according to a charging and discharging state of the electronic device and the estimated power. The estimated power is converted into mapping power based on the slope parameter. The mapping power is disposed on a user interface.
    Type: Application
    Filed: December 5, 2023
    Publication date: January 23, 2025
    Applicant: ASUSTeK COMPUTER INC.
    Inventors: Shih-Teng Chiu, Hui-Hsiang Lin, Chih-Hung Lee, Chia-Yuan Chang, Po-Chun Chen, Chih-Hsiang Chiu
  • Patent number: 12204163
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: February 5, 2024
    Date of Patent: January 21, 2025
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Patent number: 12204195
    Abstract: An electronic device includes a scattering structure, a dimming structure and a controller. The dimming structure is arranged on the scattering structure. The controller is electrically connected to the dimming structure. The controller includes a first control unit, and the first control unit is provided to adjust the transmittance of the dimming structure.
    Type: Grant
    Filed: January 16, 2024
    Date of Patent: January 21, 2025
    Assignee: INNOLUX CORPORATION
    Inventors: En-Hsiang Chen, Chih-Chin Kuo, Mao-Shiang Lin, Hsu-Kuan Hsu, WenQi Lin, Tzu-Chieh Lai
  • Patent number: 12203971
    Abstract: A method for inspecting LED dies includes the following steps. First electrodes and second electrodes of LED dies to be inspected are short-circuited via a conductive layer on an inspection substrate, or an inspection bias voltage is applied between the first electrodes and the second electrodes of the LED dies. An excitation light is irradiated on the LED dies to be inspected on the inspection substrate such that the LED dies to be inspected emit a secondary light. When the first electrodes and the second electrodes of the LED dies to be inspected are open, short-circuited, and/or subjected to the inspection bias voltage, the secondary light is captured via an optical sensor. An output of the optical sensor is received via a computer and a spectrum difference of the secondary light is calculated to determine whether the LED dies are abnormal or to classify the LED dies to be inspected.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: January 21, 2025
    Assignee: Industrial Technology Research Institute
    Inventors: Yan-Rung Lin, Chih-Hsiang Liu, Chung-Lun Kuo
  • Patent number: 12206059
    Abstract: A light emitting element package includes a first substrate, at least one light emitting element, an encapsulation layer, and a plurality of conductive pads. The first substrate has an upper surface and a lower surface opposite to each other, in which an edge of the lower surface has a notch. The at least one light emitting element is disposed on the upper surface of the first substrate, in which the light emitting element has a positive electrode and a negative electrode. The encapsulation layer covers the light emitting element. The plurality of conductive pads are disposed on the lower surface of the first substrate and electrically connected to the positive electrode and the negative electrode of the light emitting element, respectively.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: January 21, 2025
    Assignee: Lextar Electronics Corporation
    Inventors: Chih-Hao Lin, Wei-Yuan Ma, Jo-Hsiang Chen
  • Publication number: 20240239986
    Abstract: A copolyester is formed by copolymerizing a depolymerized polyester and succinic acid. The depolymerized polyester includes depolymerized polyethylene terephthalate (PET), and the depolymerized PET is formed by depolymerizing PET with ethylene glycol. The repeating unit of PET and the succinic acid have a molar ratio of 40:60 to 50:50. The repeating unit of PET and the ethylene glycol have a molar ratio of 100:100 to 100:500. The copolyester has a storage modulus of 1*104 Pa to 1*106 Pa at 80° C. The copolyester can be used in a hot melt adhesive.
    Type: Application
    Filed: January 17, 2024
    Publication date: July 18, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Che-Tseng LIN, Meng-Hsin CHEN, Jen-Chun CHIU, Kai-Chuan KUO, Yu-Lin CHU, Po-Hsien HO, Ke-Hsuan LUO, Chih-Hsiang LIN, Hui-Ching HSU
  • Publication number: 20240150656
    Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, a fourth repeating unit, and a fifth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), the fourth repeating unit has a structure of Formula (IV), and the fifth repeating unit has a structure of Formula (V), a structure of Formula (VI), or a structure of Formula (VII) wherein A1, A2, A3, A4, X1, Z1, R1, R2, R3 and Q are as defined in the specification.
    Type: Application
    Filed: September 22, 2023
    Publication date: May 9, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Lin CHU, Jen-Chun CHIU, Po-Hsien HO, Yu-Min HAN, Meng-Hsin CHEN, Chih-Hsiang LIN
  • Publication number: 20240124706
    Abstract: A liquid crystal polymer, composition, liquid crystal polymer film, laminated material and method of forming liquid crystal polymer film are provided. The liquid crystal polymer includes a first repeating unit, a second repeating unit, a third repeating unit, and a fourth repeating unit. The first repeating unit has a structure of Formula (I), the second repeating unit has a structure of Formula (II), the third repeating unit has a structure of Formula (III), and the fourth repeating unit has a structure of Formula (IV), a structure of Formula (V) or a structure of Formula (VI) wherein A1, A2, A3, Z1, R1, R2, R3 and Q are as defined in the specification.
    Type: Application
    Filed: September 22, 2023
    Publication date: April 18, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Lin CHU, Jen-Chun CHIU, Po- Hsien HO, Yu-Min HAN, Meng-Hsin CHEN, Chih-Hsiang LIN
  • Patent number: 11866632
    Abstract: Liquid-crystal polymer is composed of the following repeating units: 10 mol % to 35 mol % of 10 mol % to 35 mol % of 10 mol % to 50 mol % of and 10 mol % to 40 mol % of 10 mol % to 40 mol % of or a combination thereof. Each of AR1, AR2, AR3, and AR4 is independently AR5 or AR5-Z-AR6, in which each of AR5 and AR6 is independently or a combination thereof, and Z is —O—, or C1-5 alkylene group. Each of X and Y is independently H, C1-5 alkyl group, CF3, or wherein R2 is H, CH3, CH(CH3)2, C(CH3)3, CF3, or n=1 to 4; and wherein R1 is C1-5 alkylene group.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: January 9, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Lin Chu, Jen-Chun Chiu, Zu-Chiang Gu, Po-Hsien Ho, Meng-Hsin Chen, Chih-Hsiang Lin
  • Publication number: 20230045809
    Abstract: A method for automatically cleaning a probe card includes the following operations. A first wafer is tested in a chamber of a testing machine. A yield of the first wafer is monitored by a tool online monitor system (TOMS). An instruction file is transmitted by the TOMS to a tester, in which the instruction file compiles a first program code of the TOMS into a second program code of the tester. The second program code of the tester is received by the tester. A general purpose interface bus (GPIB) command is transferred to a testing machine by the tester. A cleaning operation is performed by the testing machine.
    Type: Application
    Filed: August 11, 2021
    Publication date: February 16, 2023
    Inventors: Che-Wei CHEN, Ting-Wei YU, Chih-Hsiang LIN
  • Patent number: 11572438
    Abstract: A liquid-crystal polymer includes at least one repeating unit having a spiro structure, and the repeating unit occupies 1 mol % to 20 mol % of the liquid-crystal polymer. The liquid-crystal polymer is composed of the following repeating units: 1 mol % to 20 mol % of 10 mol % to 35 mol % of 10 mol % to 35 mol % of 10 mol % to 50 mol % of and 10 mol % to 40 mol % of AR1 is wherein each of ring R and ring S is independently a C3-20 ring, ring R and ring S share a carbon atom, and each of K1 and K2 is independently a C5-20 conjugated system. Each of AR2, AR3, AR4, and AR5 is independently AR6 or AR6—Z—AR7.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: February 7, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Lin Chu, Jen-Chun Chiu, Zu-Chiang Gu, Po-Hsien Ho, Meng-Hsin Chen, Chih-Hsiang Lin
  • Patent number: 11475863
    Abstract: A display driving device and an anti-interference method thereof are provided. A timing controller outputs a data signal. A source driver detects an interference event according to the data signal, and outputs a feedback signal to the timing controller in response to the detection result of the interference event. The timing controller adjusts the signal strength of the data signal according to the feedback signal.
    Type: Grant
    Filed: June 7, 2020
    Date of Patent: October 18, 2022
    Assignee: HIMAX TECHNOLOGIES LIMITED
    Inventors: Peng-Chi Chen, Mong-Hua Tu, Chih-Hsiang Lin
  • Publication number: 20210383770
    Abstract: A display driving device and an anti-interference method thereof are provided. A timing controller outputs a data signal. A source driver detects an interference event according to the data signal, and outputs a feedback signal to the timing controller in response to the detection result of the interference event. The timing controller adjusts the signal strength of the data signal according to the feedback signal.
    Type: Application
    Filed: June 7, 2020
    Publication date: December 9, 2021
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Peng-Chi Chen, Mong-Hua Tu, Chih-Hsiang Lin