Patents by Inventor Chih-Hsiang Yang

Chih-Hsiang Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250124979
    Abstract: A control device, for controlling an operation of a memory device, wherein the memory device includes a plurality of memory blocks, each of the memory blocks includes a plurality of memory cells, and each of the memory cells stores a bit-data. The control device comprises the following elements. A processor, for classifying the memory cells into a plurality of groups according to an erase count of each of the memory cells, the groups respectively correspond to a plurality of recovery times. A memory interface control circuit, coupled to the processor and the memory device, and the processor controls the memory device to perform a bit recovery operation through the memory interface control circuit. The processor selects one of the groups according to the recovery times, and performs the bit recovery operation on the bit-data of each of the memory cells in the selected group.
    Type: Application
    Filed: October 11, 2023
    Publication date: April 17, 2025
    Inventors: Wei-Cheng SU, Chih-Hsiang YANG, Hsiang-Lan LUNG
  • Patent number: 12277332
    Abstract: The application provides a method and a memory device for performing wear leveling in a memory device. The method includes: receiving data to be written transmitted by a host in the memory device; predicting the data to be written as a first type of data or a second type of data; referencing an erase count table in an erase count table buffer of the memory device; and when the data to be written is predicted as the first type of data, writing the data to be written into the block with a highest erase count among these blocks, and when the data to be written is predicted as the second type of data, writing the data to be written into the block with a lowest erase count among these blocks.
    Type: Grant
    Filed: August 18, 2023
    Date of Patent: April 15, 2025
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Wei-Cheng Su, Chih-Hsiang Yang, Hsiang-Lan Lung
  • Patent number: 12268010
    Abstract: A memory device includes a substrate, a first conductive stripe disposed on the substrate and extending along a first direction, a second conductive stripe disposed on the first conductive stripe, a first pillar element and a spacer. The second conductive stripe extends along a second direction intersected with the first direction. A thickness of the second conductive stripe is greater than a thickness of the first conductive stripe, and the second conductive stripe is an integral structure. The first pillar element is disposed at an intersection between the first conductive stripe and the second conductive stripe, and extends from a top surface of the first conductive stripe to a bottom surface of the second conductive stripe along a third direction intersected with the first direction and the second direction. The first pillar element includes a switching layer and a memory layer corresponding to a first level.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: April 1, 2025
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Erh-Kun Lai, Hsiang-Lan Lung, Chih-Hsiang Yang
  • Publication number: 20250060892
    Abstract: The application provides a method and a memory device for performing wear leveling in a memory device. The method includes: receiving data to be written transmitted by a host in the memory device; predicting the data to be written as a first type of data or a second type of data; referencing an erase count table in an erase count table buffer of the memory device; and when the data to be written is predicted as the first type of data, writing the data to be written into the block with a highest erase count among these blocks, and when the data to be written is predicted as the second type of data, writing the data to be written into the block with a lowest erase count among these blocks.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 20, 2025
    Inventors: Wei-Cheng SU, Chih-Hsiang YANG, Hsiang-Lan LUNG
  • Patent number: 12153815
    Abstract: The application discloses a semiconductor memory device and a data storage method. When determining that an input data conforms to a target format, an input data vector is generated based on the input data. When determining that the input data is similar to a stored data in a target block of the memory array, the input data is written to a blank target memory page of the target block of the memory array.
    Type: Grant
    Filed: November 16, 2023
    Date of Patent: November 26, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Wei-Cheng Su, Chih-Hsiang Yang, Hsiang-Lan Lung
  • Patent number: 12008935
    Abstract: An arcuate display device includes a plurality of display units each having has a plurality of pixels, a virtual axis, and a plurality of driving devices. Each pixel includes first, second, and third light-emitting elements respectively disposed at first, second, and third positions. The driving devices corresponding to the display units having the same minimum distance from the virtual axis have the same circuit layout design. The first, second, and third positions are sequentially arranged in a direction away from the virtual axis. Optical properties of the first light-emitting elements and the third light-emitting elements in at least a part of the pixels disposed at a first side of the virtual axis are respectively substantially the same as optical properties of the third light-emitting elements and the first light-emitting elements in at least a part of the pixels disposed at a second side of the virtual axis.
    Type: Grant
    Filed: March 1, 2023
    Date of Patent: June 11, 2024
    Assignee: AUO Corporation
    Inventors: Kai-Yi Lu, Hung-Chi Wang, Chen-Yu Lin, Ya-Fang Chen, Chih-Hsiang Yang
  • Patent number: 11996838
    Abstract: A driving device comprises a first complementary metal-oxygen-semiconductor circuit and a first comparator. The first complementary metal-oxygen-semiconductor circuit is configured for outputting a power signal or a pull-down signal according to the first input signal. The first comparator comprises a first non-inverting input terminal and a first inverting input terminal. The first non-inverting input terminal is coupled to the first complementary metal-oxygen-semiconductor circuit, and is configured to receive the power signal or the pull-down signal. The first inverting input terminal is configured for receiving a first reference signal, and the first comparator is configured to compare one of the power signal and the pull-down signal and the first reference signal to provide a first driving signal.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: May 28, 2024
    Assignee: AUO CORPORATION
    Inventors: Chi-Yu Geng, Ming-Hung Tu, Ya-Fang Chen, Chih-Hsiang Yang
  • Patent number: 11862076
    Abstract: Disclosed is a light-emitting diode display module, including a first light-emitting diode, a second light-emitting diode, a third light-emitting diode, a scan block, a voltage conversion block, a first sink block, and a second sink block. An operating voltage of the first light-emitting diode is lower than that of the second and third light-emitting diodes. The voltage conversion block provides an auxiliary power supply voltage based on a high power supply voltage and a low power supply voltage. The first light-emitting diode is coupled between the scan block and the first sink block receiving the high power supply voltage and the auxiliary power supply voltage. The second light-emitting diode and the third light-emitting diode are coupled between the scan block and the second sink block receiving the high power supply voltage and the low power supply voltage.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: January 2, 2024
    Assignee: AUO Corporation
    Inventors: Chung-Hsien Hsu, Chi-Yu Geng, Shu-Hao Chang, Hung-Chi Wang, Ming-Hung Tu, Ya-Fang Chen, Chih-Hsiang Yang
  • Patent number: 11791444
    Abstract: A display apparatus including a circuit substrate, a plurality of light-emitting elements, an optical film, and an adhesive layer is provided. These light-emitting elements are electrically bonded to the circuit substrate. The optical film overlaps the light-emitting elements. The light-emitting elements are disposed between the optical film and the circuit substrate. The adhesive layer is disposed between the optical film and the circuit substrate, and connects the light-emitting elements and the optical film. A cavity is provided between the light-emitting elements, the circuit substrate, and the adhesive layer.
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: October 17, 2023
    Assignee: Au Optronics Corporation
    Inventors: Chih-Wei Chien, Chih-Hsiang Yang, Shau-Yu Tsai, Cheng-Chuan Chen, Chih-Ling Hsueh
  • Publication number: 20230301117
    Abstract: A memory device includes a substrate, a first conductive stripe disposed on the substrate and extending along a first direction, a second conductive stripe disposed on the first conductive stripe, a first pillar element and a spacer. The second conductive stripe extends along a second direction intersected with the first direction. A thickness of the second conductive stripe is greater than a thickness of the first conductive stripe, and the second conductive stripe is an integral structure. The first pillar element is disposed at an intersection between the first conductive stripe and the second conductive stripe, and extends from a top surface of the first conductive stripe to a bottom surface of the second conductive stripe along a third direction intersected with the first direction and the second direction. The first pillar element includes a switching layer and a memory layer corresponding to a first level.
    Type: Application
    Filed: March 18, 2022
    Publication date: September 21, 2023
    Inventors: Erh-Kun LAI, Hsiang-Lan LUNG, Chih-Hsiang YANG
  • Publication number: 20230282144
    Abstract: An arcuate display device includes a plurality of display units each having has a plurality of pixels, a virtual axis, and a plurality of driving devices. Each pixel includes first, second, and third light-emitting elements respectively disposed at first, second, and third positions. The driving devices corresponding to the display units having the same minimum distance from the virtual axis have the same circuit layout design. The first, second, and third positions are sequentially arranged in a direction away from the virtual axis. Optical properties of the first light-emitting elements and the third light-emitting elements in at least a part of the pixels disposed at a first side of the virtual axis are respectively substantially the same as optical properties of the third light-emitting elements and the first light-emitting elements in at least a part of the pixels disposed at a second side of the virtual axis.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 7, 2023
    Applicant: AUO Corporation
    Inventors: Kai-Yi Lu, Hung-Chi Wang, Chen-Yu Lin, Ya-Fang Chen, Chih-Hsiang Yang
  • Publication number: 20230282160
    Abstract: Disclosed is a light-emitting diode display module, including a first light-emitting diode, a second light-emitting diode, a third light-emitting diode, a scan block, a voltage conversion block, a first sink block, and a second sink block. An operating voltage of the first light-emitting diode is lower than that of the second and third light-emitting diodes. The voltage conversion block provides an auxiliary power supply voltage based on a high power supply voltage and a low power supply voltage. The first light-emitting diode is coupled between the scan block and the first sink block receiving the high power supply voltage and the auxiliary power supply voltage. The second light-emitting diode and the third light-emitting diode are coupled between the scan block and the second sink block receiving the high power supply voltage and the low power supply voltage.
    Type: Application
    Filed: February 21, 2023
    Publication date: September 7, 2023
    Applicant: AUO Corporation
    Inventors: Chung-Hsien Hsu, Chi-Yu Geng, Shu-Hao Chang, Hung-Chi Wang, Ming-Hung Tu, Ya-Fang Chen, Chih-Hsiang Yang
  • Publication number: 20230207536
    Abstract: The present disclosure provides a display device, including first to fourth LEDs, a line structure, and first to fourth lines. The second LED is arranged in a first direction corresponding to the first LED. The fourth LED is arranged in a second direction corresponding to the third LED. The line structure includes first to third line segments. The first line is coupled to the first LED. The second line is coupled to the second LED. The third line is coupled to the third LED. The fourth line is coupled to the fourth LED. A portion of the first line and a portion of the second line are in parallel with the first line segment, a portion of the third line is in parallel with the second line segment, and a portion of the fourth line is in parallel with the third line segment.
    Type: Application
    Filed: July 12, 2022
    Publication date: June 29, 2023
    Inventors: Jeng-Lin CAI, Chung-Hsien HSU, Ming-Hung TU, Ya-Fang CHEN, Chih-Hsiang YANG
  • Publication number: 20230185237
    Abstract: A holographic energy system is operable to generate an output wavefront according to a complex amplitude function. The holographic energy system includes a continuous three-dimensional energy medium, an array of energy devices configured to output energy to interact with the continuous three-dimensional energy medium to define a hologram therein, and an electromagnetic (EM) energy source positioned to output coherent EM energy that is incident on the hologram in the continuous three-dimensional energy medium to generate an output wavefront.
    Type: Application
    Filed: November 18, 2022
    Publication date: June 15, 2023
    Inventors: Chih-Hsiang Yang, Jonathan Sean Karafin, Brendan Elwood Bevensee
  • Publication number: 20230155586
    Abstract: A driving device comprises a first complementary metal-oxygen-semiconductor circuit and a first comparator. The first complementary metal-oxygen-semiconductor circuit is configured for outputting a power signal or a pull-down signal according to the first input signal. The first comparator comprises a first non-inverting input terminal and a first inverting input terminal. The first non-inverting input terminal is coupled to the first complementary metal-oxygen-semiconductor circuit, and is configured to receive the power signal or the pull-down signal. The first inverting input terminal is configured for receiving a first reference signal, and the first comparator is configured to compare one of the power signal and the pull-down signal and the first reference signal to provide a first driving signal.
    Type: Application
    Filed: July 12, 2022
    Publication date: May 18, 2023
    Inventors: Chi-Yu GENG, Ming-Hung TU, Ya-Fang CHEN, Chih-Hsiang YANG
  • Patent number: 11620940
    Abstract: The present disclosure provides a driving circuit, including a transistor and a level shifter. The first terminal of the transistor is electrically connected to a light emitting diode and is configured to receive a supply voltage. The second terminal of the transistor is configured to receive a first reference voltage. The level shifter is configured to receive an input signal from a previous-stage driving circuit and adjust the voltage level of the input signal according to a voltage operating range formed by the supply voltage and the first reference voltage to generate a level-shifted signal corresponding to the voltage operating range and configured to control the transistor. The input signal varies between a second reference voltage and the supply voltage. The second reference voltage and the first reference voltage are different from each other and both lower than the supply voltage.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: April 4, 2023
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chung-Hsien Hsu, Ming-Hung Tu, Ya-Fang Chen, Chih-Hsiang Yang
  • Patent number: 11568799
    Abstract: A driving circuit for a display panel and including a receiving interface, a timing controller, a pulse width modulation controller and a line latch is disclosed. The receiving interface is configured to receive a first input signal, a second input signal and a link signal to generate a plurality of display data accordingly, wherein the first input signal and the second input signal are a pair of differential signals. The timing controller is configured to interpret the first input signal, the second input signal and the link signal to generate a trigger signal. The pulse width modulation controller is configured to perform pulse width modulation to generate a first output signal and a second output signal. The line latch is configured to hold the first and second output signals, and output the first and second output signals according to the trigger signal to drive the display panel.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: January 31, 2023
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chih-Hao Hung, Hung-Chi Wang, Ya-Fang Chen, Chih-Hsiang Yang
  • Publication number: 20220407000
    Abstract: A memory cell formed in a pillar structure between a first electrode and a second electrode includes laminated encapsulation structure. In one example, the pillar includes a body of ovonic threshold switch material, carbon-based intermediate layers, metal layers and a body of phase change memory material in electrical series between the first and second electrodes. The laminated encapsulation structure surrounds the pillar. The laminated dielectric encapsulation structure comprises at least three conformal layers, including a first layer of material, a second conformal layer of a second layer material different from the first layer material; and a third conformal layer of a third layer material different from the second layer material.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 22, 2022
    Applicants: MACRONIX INTERNATIONAL CO., LTD., INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chih-Hsiang YANG, Hsiang-Lan LUNG, Wei-Chih CHIEN, Cheng-Wei CHENG, Matthew J. BRIGHTSKY
  • Patent number: 11443679
    Abstract: A display device and a display method are provided. The display device includes a board, a sensing circuit, and a feedback control circuit. The board includes a display array formed by a plurality of pixels. The sensing circuit includes a test pixel and a light sensor. The light sensor receives light emitted by the test pixel to generate a corresponding sensing signal. The feedback control circuit receives the sensing signal and generates a pulse width adjusting signal to adjust a pulse width at which the pixels are operated for display.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: September 13, 2022
    Assignee: Au Optronics Corporation
    Inventors: Pei-Fen Lai, Hung-Chi Wang, Ya-Fang Chen, Chih-Hsiang Yang
  • Publication number: 20220284845
    Abstract: A display device and a display method are provided. The display device includes a board, a sensing circuit, and a feedback control circuit. The board includes a display array formed by a plurality of pixels. The sensing circuit includes a test pixel and a light sensor. The light sensor receives light emitted by the test pixel to generate a corresponding sensing signal. The feedback control circuit receives the sensing signal and generates a pulse width adjusting signal to adjust a pulse width at which the pixels are operated for display.
    Type: Application
    Filed: August 12, 2021
    Publication date: September 8, 2022
    Applicant: Au Optronics Corporation
    Inventors: Pei-Fen Lai, Hung-Chi Wang, Ya-Fang Chen, Chih-Hsiang Yang