Abstract: An antenna module includes a first metal plate and a frame body. The frame body surrounds the first metal plate. The frame body includes a first antenna radiator, a second antenna radiator, a third antenna radiator, a first breakpoint and a second breakpoint. The first antenna radiator includes a first feeding end and excites a first frequency band. The second antenna radiator includes a second feeding end and excites a second frequency band. The third antenna radiator includes a third feeding end and excites a third frequency band. The first breakpoint is located between the first antenna radiator and the second antenna radiator. The second breakpoint is located between the second antenna radiator and the third antenna radiator. An electronic device including the above-mentioned antenna module is also provided.

Abstract: A gas flow accelerator may include a body portion, and a tapered body portion including a first end integrally formed with the body portion. The gas flow accelerator may include an inlet port connected to the body portion and to receive a process gas to be removed from a semiconductor processing tool by a main pumping line. The semiconductor processing tool may include a chuck and a chuck vacuum line to apply a vacuum to the chuck to retain a semiconductor device. The tapered body portion may be configured to generate a rotational flow of the process gas to prevent buildup of processing byproduct on interior walls of the main pumping line. The gas flow accelerator may include an outlet port integrally formed with a second end of the tapered body portion. An end portion of the chuck vacuum line may be provided through the outlet port.

Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.

Abstract: An electronic device including a bracket and an antenna is provided. The bracket includes first, second, third, and fourth surfaces. The antenna includes a radiator. The radiator includes first, second, third, and fourth portions. The first portion is located on the first surface and includes connected first and second sections. The second portion is located on the second surface and includes third, fourth, fifth, and sixth sections. The third section, the fourth section, and the fifth sections are bent and connected to form a U shape. The third portion is located on the third surface and is connected to the second section and the fourth section. The fourth portion is located on the fourth surface and is connected to the fifth section, the sixth section, and the third portion. The radiator is adapted to resonate at a low frequency band and a first high frequency band.

Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.

Abstract: A method includes following steps. A semiconductor fin is formed extending from a substrate. A gate structure is formed extending across the semiconductor fin. Recesses are etched in the semiconductor fin. Source/drain epitaxial structures are formed in the recesses in the semiconductor fin. Formation of each of the source/drain epitaxial structures comprises performing a first epitaxy growth process to form a bar-shaped epitaxial structure in one of the recesses, and performing a second epitaxy growth process to form a cladding epitaxial layer cladding on the bar-shaped epitaxial structure. The bar-shaped epitaxial structure has a lower phosphorous concentration than the cladding epitaxial layer.

Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.

Abstract: Disclosed is a light-emitting diode display module, including a first light-emitting diode, a second light-emitting diode, a third light-emitting diode, a scan block, a voltage conversion block, a first sink block, and a second sink block. An operating voltage of the first light-emitting diode is lower than that of the second and third light-emitting diodes. The voltage conversion block provides an auxiliary power supply voltage based on a high power supply voltage and a low power supply voltage. The first light-emitting diode is coupled between the scan block and the first sink block receiving the high power supply voltage and the auxiliary power supply voltage. The second light-emitting diode and the third light-emitting diode are coupled between the scan block and the second sink block receiving the high power supply voltage and the low power supply voltage.

Abstract: A display apparatus including a circuit substrate, a plurality of light-emitting elements, an optical film, and an adhesive layer is provided. These light-emitting elements are electrically bonded to the circuit substrate. The optical film overlaps the light-emitting elements. The light-emitting elements are disposed between the optical film and the circuit substrate. The adhesive layer is disposed between the optical film and the circuit substrate, and connects the light-emitting elements and the optical film. A cavity is provided between the light-emitting elements, the circuit substrate, and the adhesive layer.

Abstract: A memory device includes a substrate, a first conductive stripe disposed on the substrate and extending along a first direction, a second conductive stripe disposed on the first conductive stripe, a first pillar element and a spacer. The second conductive stripe extends along a second direction intersected with the first direction. A thickness of the second conductive stripe is greater than a thickness of the first conductive stripe, and the second conductive stripe is an integral structure. The first pillar element is disposed at an intersection between the first conductive stripe and the second conductive stripe, and extends from a top surface of the first conductive stripe to a bottom surface of the second conductive stripe along a third direction intersected with the first direction and the second direction. The first pillar element includes a switching layer and a memory layer corresponding to a first level.

Abstract: Disclosed is a light-emitting diode display module, including a first light-emitting diode, a second light-emitting diode, a third light-emitting diode, a scan block, a voltage conversion block, a first sink block, and a second sink block. An operating voltage of the first light-emitting diode is lower than that of the second and third light-emitting diodes. The voltage conversion block provides an auxiliary power supply voltage based on a high power supply voltage and a low power supply voltage. The first light-emitting diode is coupled between the scan block and the first sink block receiving the high power supply voltage and the auxiliary power supply voltage. The second light-emitting diode and the third light-emitting diode are coupled between the scan block and the second sink block receiving the high power supply voltage and the low power supply voltage.

Abstract: An arcuate display device includes a plurality of display units each having has a plurality of pixels, a virtual axis, and a plurality of driving devices. Each pixel includes first, second, and third light-emitting elements respectively disposed at first, second, and third positions. The driving devices corresponding to the display units having the same minimum distance from the virtual axis have the same circuit layout design. The first, second, and third positions are sequentially arranged in a direction away from the virtual axis. Optical properties of the first light-emitting elements and the third light-emitting elements in at least a part of the pixels disposed at a first side of the virtual axis are respectively substantially the same as optical properties of the third light-emitting elements and the first light-emitting elements in at least a part of the pixels disposed at a second side of the virtual axis.

Abstract: The present disclosure provides a display device, including first to fourth LEDs, a line structure, and first to fourth lines. The second LED is arranged in a first direction corresponding to the first LED. The fourth LED is arranged in a second direction corresponding to the third LED. The line structure includes first to third line segments. The first line is coupled to the first LED. The second line is coupled to the second LED. The third line is coupled to the third LED. The fourth line is coupled to the fourth LED. A portion of the first line and a portion of the second line are in parallel with the first line segment, a portion of the third line is in parallel with the second line segment, and a portion of the fourth line is in parallel with the third line segment.

Abstract: A holographic energy system is operable to generate an output wavefront according to a complex amplitude function. The holographic energy system includes a continuous three-dimensional energy medium, an array of energy devices configured to output energy to interact with the continuous three-dimensional energy medium to define a hologram therein, and an electromagnetic (EM) energy source positioned to output coherent EM energy that is incident on the hologram in the continuous three-dimensional energy medium to generate an output wavefront.

Abstract: A driving device comprises a first complementary metal-oxygen-semiconductor circuit and a first comparator. The first complementary metal-oxygen-semiconductor circuit is configured for outputting a power signal or a pull-down signal according to the first input signal. The first comparator comprises a first non-inverting input terminal and a first inverting input terminal. The first non-inverting input terminal is coupled to the first complementary metal-oxygen-semiconductor circuit, and is configured to receive the power signal or the pull-down signal. The first inverting input terminal is configured for receiving a first reference signal, and the first comparator is configured to compare one of the power signal and the pull-down signal and the first reference signal to provide a first driving signal.

Abstract: The present disclosure provides a driving circuit, including a transistor and a level shifter. The first terminal of the transistor is electrically connected to a light emitting diode and is configured to receive a supply voltage. The second terminal of the transistor is configured to receive a first reference voltage. The level shifter is configured to receive an input signal from a previous-stage driving circuit and adjust the voltage level of the input signal according to a voltage operating range formed by the supply voltage and the first reference voltage to generate a level-shifted signal corresponding to the voltage operating range and configured to control the transistor. The input signal varies between a second reference voltage and the supply voltage. The second reference voltage and the first reference voltage are different from each other and both lower than the supply voltage.

Abstract: A driving circuit for a display panel and including a receiving interface, a timing controller, a pulse width modulation controller and a line latch is disclosed. The receiving interface is configured to receive a first input signal, a second input signal and a link signal to generate a plurality of display data accordingly, wherein the first input signal and the second input signal are a pair of differential signals. The timing controller is configured to interpret the first input signal, the second input signal and the link signal to generate a trigger signal. The pulse width modulation controller is configured to perform pulse width modulation to generate a first output signal and a second output signal. The line latch is configured to hold the first and second output signals, and output the first and second output signals according to the trigger signal to drive the display panel.

Abstract: A memory cell formed in a pillar structure between a first electrode and a second electrode includes laminated encapsulation structure. In one example, the pillar includes a body of ovonic threshold switch material, carbon-based intermediate layers, metal layers and a body of phase change memory material in electrical series between the first and second electrodes. The laminated encapsulation structure surrounds the pillar. The laminated dielectric encapsulation structure comprises at least three conformal layers, including a first layer of material, a second conformal layer of a second layer material different from the first layer material; and a third conformal layer of a third layer material different from the second layer material.

Abstract: A display device and a display method are provided. The display device includes a board, a sensing circuit, and a feedback control circuit. The board includes a display array formed by a plurality of pixels. The sensing circuit includes a test pixel and a light sensor. The light sensor receives light emitted by the test pixel to generate a corresponding sensing signal. The feedback control circuit receives the sensing signal and generates a pulse width adjusting signal to adjust a pulse width at which the pixels are operated for display.

Abstract: A display device and a display method are provided. The display device includes a board, a sensing circuit, and a feedback control circuit. The board includes a display array formed by a plurality of pixels. The sensing circuit includes a test pixel and a light sensor. The light sensor receives light emitted by the test pixel to generate a corresponding sensing signal. The feedback control circuit receives the sensing signal and generates a pulse width adjusting signal to adjust a pulse width at which the pixels are operated for display.