Patents by Inventor Chih-Hsien Cheng

Chih-Hsien Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974367
    Abstract: A lighting device includes a light board and a light dimmer circuit. The light board includes multiple first light emitting elements and second light emitting elements. The first light emitting elements are disposed in a first area of the light board. The second light emitting elements are disposed in a second area of the light board. The light dimmer circuit is configured to drive the second light emitting elements to generate flickering lights from the second area of the light board, and is configured to drive the first light emitting elements to generate non-flickering lights from the first area of the light board.
    Type: Grant
    Filed: October 4, 2022
    Date of Patent: April 30, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chih-Hsien Wang, Ming-Chieh Cheng, Po-Yen Chen, Shih-Chieh Chang, Kuan-Hsien Tu, Xiu-Yi Lin, Ling-Chun Wang
  • Patent number: 11956869
    Abstract: A display driver circuit for controlling a display panel having a plurality of light-emission diode (LED) strings includes a plurality of current regulators and a control circuit. Each of the plurality of current regulators is configured to control one of the plurality of LED strings. The control circuit, coupled to the plurality of current regulators, is configured to generate a plurality of pulses in a plurality of pulse width modulation (PWM) signals and output each of the plurality of PWM signals to a respective current regulator among the plurality of current regulators. Wherein, the plurality of pulses are scrambled.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: April 9, 2024
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Chih-Hsien Chou, Jhih-Siou Cheng, Jin-Yi Lin, Ren-Chieh Yang
  • Publication number: 20240112612
    Abstract: A display driver and a driving method thereof is disclosed. The display driver includes at least one first latch, at least one second latch, an output buffer, and a comparator. The first latch receives input data. The input terminal of the second latch is coupled to the output terminal of the first latch. The output buffer, including at least one variable current source, is coupled to the second latch. The comparator is coupled to the first latch, the second latch, and the variable current source. The comparator generates at least one control signal of the variable current source.
    Type: Application
    Filed: December 4, 2023
    Publication date: April 4, 2024
    Inventors: JHIH-SIOU CHENG, YEN-RU KUO, CHIH-HSIEN CHOU
  • Patent number: 10297517
    Abstract: A manufacturing method of a package carrier is provided. A substrate having a through hole is provided, wherein a profile of the through hole from top view is a first rounded rectangular. A heat conducting slug is disposed inside the through hole, wherein the heat conducting slug and an inner wall of the through hole are separated with a gap, and a profile of the heat conducting slug from top view is a second rounded rectangular. An insulating material is filled in the through hole so as to fix the heat conducting slug in the through hole. A conductive through hole structure, a first and a second patterned circuit layers are formed. The first and the second patterned circuit layers are respectively formed on two opposite sides of the substrate. The conductive through hole structure penetrates the substrate and connects portions of the first and the second patterned circuit layers.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: May 21, 2019
    Assignee: Subtron Technology Co., Ltd.
    Inventor: Chih-Hsien Cheng
  • Patent number: 10177067
    Abstract: A manufacturing method including following steps is provided. A substrate that includes a core layer, a first conductive layer, and a second conductive layer is provided. A heat conducting channel is formed in the substrate, and an adhesion layer is formed on the second conductive layer to cover a side of the heat conducting channel. A heat conducting element and a buffer layer are placed into the heat conducting channel, and a gap is formed between either the heat conducting element or the buffer layer and an inner side surface of the heat conducting channel. The gap is filled with a first insulant material, and the adhesion layer and the buffer layer are removed to form a cavity and expose the heat conducting element. The first conductive layer and the second conductive layer are patterned to form a first patterned circuit layer and a second patterned circuit layer, respectively.
    Type: Grant
    Filed: May 18, 2017
    Date of Patent: January 8, 2019
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Chih-Hsien Cheng, Shih-Hao Sun
  • Publication number: 20180114739
    Abstract: A manufacturing method including following steps is provided. A substrate that includes a core layer, a first conductive layer, and a second conductive layer is provided. A heat conducting channel is formed in the substrate, and an adhesion layer is formed on the second conductive layer to cover a side of the heat conducting channel. A heat conducting element and a buffer layer are placed into the heat conducting channel, and a gap is formed between either the heat conducting element or the buffer layer and an inner side surface of the heat conducting channel. The gap is filled with a first insulant material, and the adhesion layer and the buffer layer are removed to form a cavity and expose the heat conducting element. The first conductive layer and the second conductive layer are patterned to form a first patterned circuit layer and a second patterned circuit layer, respectively.
    Type: Application
    Filed: May 18, 2017
    Publication date: April 26, 2018
    Applicant: Subtron Technology Co., Ltd.
    Inventors: Chin-Sheng Wang, Chih-Hsien Cheng, Shih-Hao Sun
  • Publication number: 20180025956
    Abstract: A manufacturing method of a package carrier is provided. A substrate having a through hole is provided, wherein a profile of the through hole from top view is a first rounded rectangular. A heat conducting slug is disposed inside the through hole, wherein the heat conducting slug and an inner wall of the through hole are separated with a gap, and a profile of the heat conducting slug from top view is a second rounded rectangular. An insulating material is filled in the through hole so as to fix the heat conducting slug in the through hole. A conductive through hole structure, a first and a second patterned circuit layers are formed. The first and the second patterned circuit layers are respectively formed on two opposite sides of the substrate. The conductive through hole structure penetrates the substrate and connects portions of the first and the second patterned circuit layers.
    Type: Application
    Filed: October 3, 2017
    Publication date: January 25, 2018
    Applicant: Subtron Technology Co., Ltd.
    Inventor: Chih-Hsien Cheng
  • Publication number: 20170086293
    Abstract: A manufacturing method of a package carrier is provided. A substrate having a through hole is provided, wherein a profile of the through hole from top view is a first rounded rectangular. A heat conducting slug is disposed inside the through hole, wherein the heat conducting slug and an inner wall of the through hole are separated with a gap, and a profile of the heat conducting slug from top view is a second rounded rectangular. An insulating material is filled in the through hole so as to fix the heat conducting slug in the through hole. A conductive through hole structure, a first and a second patterned circuit layers are formed. The first and the second patterned circuit layers are respectively formed on two opposite sides of the substrate. The conductive through hole structure penetrates the substrate and connects portions of the first and the second patterned circuit layers.
    Type: Application
    Filed: November 5, 2015
    Publication date: March 23, 2017
    Inventor: Chih-Hsien Cheng
  • Patent number: 8939188
    Abstract: An edge separation equipment and an operating method thereof are suitable for a carrier and a circuit board in a coreless process. The carrier is attached to the circuit board by a mechanically separable interface, and the edge separation equipment is used to separate the edge of the carrier from the edge of the circuit board. The edge separation equipment includes a platform, a supporting device and a wind knife device. The platform has a supporting surface on which the carrier or the circuit board is mounted. The supporting device is configured at a side of the platform. The wind knife device is configured on the supporting device, and the air jet supplied by the wind knife device blows toward the edge of the carrier and the edge of the circuit board, such that there is an edge separation width between the carrier and the circuit board.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: January 27, 2015
    Assignee: Subtron Technology Co., Ltd.
    Inventors: Chung W. Ho, Chih-Hsien Cheng
  • Publication number: 20130206331
    Abstract: An edge separation equipment and an operating method thereof are suitable for a carrier and a circuit board in a coreless process. The carrier is attached to the circuit board by a mechanically separable interface, and the edge separation equipment is used to separate the edge of the carrier from the edge of the circuit board. The edge separation equipment includes a platform, a supporting device and a wind knife device. The platform has a supporting surface on which the carrier or the circuit board is mounted. The supporting device is configured at a side of the platform. The wind knife device is configured on the supporting device, and the air jet supplied by the wind knife device blows toward the edge of the carrier and the edge of the circuit board, such that there is an edge separation width between the carrier and the circuit board.
    Type: Application
    Filed: May 14, 2012
    Publication date: August 15, 2013
    Applicant: SUBTRON TECHNOLOGY CO., LTD.
    Inventors: Chung W. Ho, Chih-Hsien Cheng
  • Publication number: 20040129760
    Abstract: A wafer transfer apparatus adapted to a wafer ball placement apparatus including at least one wafer cassette, a flux dispenser unit, a ball placement unit, a reflow oven unit, and an unloader. The apparatus is also adapted to a wafer bump printing apparatus including at least one wafer cassette, a bump printing unit, a reflow oven unit, and an unloader. The apparatus includes a robot arm for picking up a wafer from the at least one wafer cassette and transferring the wafer to/from one of the wafer cassette, the flux dispenser unit, the ball placement unit or bump printing unit, and the reflow oven unit. The apparatus may also include a stage for carrying and moving the robot arm. With the apparatus, it is possible to reduce process time, simplify steps of transferring the wafer and lower risks of breaking wafer. The invention can achieve the effects of improving the production efficiency, saving the space and simplifying the apparatus.
    Type: Application
    Filed: March 21, 2003
    Publication date: July 8, 2004
    Inventors: Chi-meng Shen, Charlie C. Chen, Yao-chi Fei, Chih-hsien Cheng
  • Publication number: 20030092257
    Abstract: A method for fabricating metal interconnects, in which a dielectric layer is formed over a substrate and then an opening is formed in the dielectric layer, is described. A metal layer is formed to fill the opening and then a protective layer is form on the surface of the metal layer by an electrochemical method. Thereafter, the protective layer and the metal layer outside the opening are removed to complete the metal interconnect process. Since the protective layer is more stable than the metal layer so that oxidation of the metal layer can be prevented, the queue time (Q-time) between the metal deposition process and the chemical mechanical polishing (CMP) process can be increased with more flexibility.
    Type: Application
    Filed: November 27, 2001
    Publication date: May 15, 2003
    Inventor: Chih-Hsien Cheng
  • Patent number: 6524176
    Abstract: A polishing pad has a first layer, a second layer, a hole and a plug. The hole is formed in the polishing pad and has a first section in the first layer of the polishing pad and a second section in a second layer of the polishing pad. The plug is embedded in the hole and has an upper portion and a lower portion. The upper portion of the plug fits into the first section of the hole, and the lower portion of the plug fits into the second section of the hole. Since the plug has a height of the polishing pad, the problem of depositions, such as water droplets, has been solved. The endpoint detection can thus be precisely controlled.
    Type: Grant
    Filed: March 25, 2002
    Date of Patent: February 25, 2003
    Assignee: Macronix International Co. Ltd.
    Inventors: Chih-Hsien Cheng, Yuh-Turng Liu
  • Patent number: D1017061
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: March 5, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chih-Hsien Wang, Shih-Chieh Chang, Yan-Jun Wang, Peng-Hui Wang, Ming-Chieh Cheng
  • Patent number: D1017062
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: March 5, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chih-Hsien Wang, Shih-Chieh Chang, Chuan-Hsi Chang, Peng-Hui Wang, Ming-Chieh Cheng
  • Patent number: D1018891
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: March 19, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chih-Hsien Wang, Shih-Chieh Chang, Peng-Hui Wang, Ming-Chieh Cheng, Xiu-Yi Lin