Patents by Inventor Chih-Hsien Huang

Chih-Hsien Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973117
    Abstract: Methods of forming contacts for source/drain regions and a contact plug for a gate stack of a finFET device are disclosed herein. Methods include etching a contact opening through a dielectric layer to expose surfaces of a first source/drain contact and repairing silicon oxide structures along sidewall surfaces of the contact opening and along planar surfaces of the dielectric layer to prevent selective loss defects from occurring during a subsequent selective deposition of conductive fill materials and during subsequent etching of other contact openings. The methods further include performing a selective bottom-up deposition of conductive fill material to form a second source/drain contact. According to some of the methods, once the second source/drain contact has been formed, the contact plug may be formed over the gate stack.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Chang-Ting Chung, Wei-Cheng Lin, Wei-Jung Lin, Chih-Wei Chang
  • Patent number: 11967898
    Abstract: A soft-switching power converter includes a main switch, an energy-releasing switch, and an inductive coupled unit. The main switch is a controllable switch. The energy-releasing switch is coupled to the main switch. The inductive coupled unit is coupled to the main switch and the energy-releasing switch. The inductive coupled unit includes a first inductance, a second inductance coupled to the first inductance, and an auxiliary switch unit. The auxiliary switch unit is coupled to the second inductance to form a closed loop. The main switch and the energy-releasing switch are alternately turned on and turned off. The auxiliary switch unit is controlled to start turning on before the main switch is turned on so as to provide at least one current path.
    Type: Grant
    Filed: January 6, 2022
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Hung-Chieh Lin, Yi-Ping Hsieh, Jin-Zhong Huang, Hung-Yu Huang, Chih-Hsien Li, Ciao-Yin Pan
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20240088182
    Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Chien Yu, Ting-Cheng Chang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 11929314
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 11929318
    Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.
    Type: Grant
    Filed: May 10, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Tsung-Hsien Chiang, Yu-Chih Huang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20240079268
    Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventors: Chih-Hui Huang, Cheng-Hsien Chou, Cheng-Yuan Tsai, Kuo-Ming Wu, Sheng-Chan Li
  • Patent number: 11876001
    Abstract: The present disclosure provides a method and system for manufacturing a semiconductor layer. The method includes: placing a first wafer in a cavity to form a metal film on the first wafer; before forming the metal film, the temperature inside the cavity is a first temperature; transferring the first wafer on which the metal film has been formed out of the cavity; the temperature in the cavity is a second temperature, and the second temperature is greater than the first temperature; introducing an inert gas into the cavity to cool the cavity, such that the temperature in the cavity is equal to the first temperature; after the temperature in the cavity is equal to the first temperature, placing a second wafer in the cavity to form the metal film on the second wafer. The manufacturing method can reduce the defects on the surface of the metal film.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: January 16, 2024
    Assignee: NEXCHIP SEMICONDUCTOR CORPORATION
    Inventors: Baoyou Gong, Chih-Hsien Huang, Jian-Zhi Fang, Cheng-Xian Yang
  • Publication number: 20230239606
    Abstract: A speaker system includes a first driver unit, a second driver unit and a cylinder case. The first driver unit and the second driver unit are disposed face to face with the same axial line. The axial line of the first driver unit and the axial line of the second driver unit forms a coaxial axial line or parallel axial lines. The cylinder case is hollow. The first driver unit and the second driver unit are disposed inside the cylinder case and contacts the inner wall of the cylinder case so that the central axial line of the cylinder case is parallel to the coaxial axial line or the parallel axial lines. A speak device includes a plurality of speaker systems. By the aforementioned configuration, even driver units may be disposed in a common cavity.
    Type: Application
    Filed: January 24, 2023
    Publication date: July 27, 2023
    Inventors: KUAN-HUNG CHEN, CHIH-HSIEN HUANG
  • Publication number: 20220076966
    Abstract: The present disclosure provides a method and system for manufacturing a semiconductor layer. The method includes: placing a first wafer in a cavity to form a metal film on the first wafer; before forming the metal film, the temperature inside the cavity is a first temperature; transferring the first wafer on which the metal film has been formed out of the cavity; the temperature in the cavity is a second temperature, and the second temperature is greater than the first temperature; introducing an inert gas into the cavity to cool the cavity, such that the temperature in the cavity is equal to the first temperature; after the temperature in the cavity is equal to the first temperature, placing a second wafer in the cavity to form the metal film on the second wafer. The manufacturing method can reduce the defects on the surface of the metal film.
    Type: Application
    Filed: July 19, 2021
    Publication date: March 10, 2022
    Applicant: NEXCHIP SEMICONDUCTOR CORPORATION
    Inventors: BAOYOU GONG, CHIH-HSIEN HUANG, JIAN-ZHI FANG, CHENG-XIAN YANG
  • Patent number: 10916417
    Abstract: A pre-processing method, a method for forming a metal silicide and a semiconductor processing apparatus are disclosed by the present invention. In the pre-processing method, a plasma etching process is performed on a semiconductor structure including a substrate. A first conductive portion and an isolation spacer covering a side surface of the first conductive portion are formed on a surface of an active area in the substrate. In the plasma etching process, a bias voltage applied to a surface of the semiconductor structure is adjusted by adjusting power outputs of two RF sources and is not lower than 150 V. In the metal silicide formation method, after a semiconductor structure including a first conductive portion and a second conductive portion is pre-processed in the manner as described above, a metal film is deposited thereon and annealed to result in the formation of the metal silicide.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: February 9, 2021
    Assignee: NEXCHIP SEMICONDUCTOR CORPORATION
    Inventors: Chih-Hsien Huang, Xiaodong Liu, Jian-Zhi Fang, Chen-Hao Liu
  • Publication number: 20210013028
    Abstract: A pre-processing method, a method for forming a metal silicide and a semiconductor processing apparatus are disclosed by the present invention. In the pre-processing method, a plasma etching process is performed on a semiconductor structure including a substrate. A first conductive portion and an isolation spacer covering a side surface of the first conductive portion are formed on a surface of an active area in the substrate. In the plasma etching process, a bias voltage applied to a surface of the semiconductor structure is adjusted by adjusting power outputs of two RF sources and is not lower than 150 V. In the metal silicide formation method, after a semiconductor structure including a first conductive portion and a second conductive portion is pre-processed in the manner as described above, a metal film is deposited thereon and annealed to result in the formation of the metal silicide.
    Type: Application
    Filed: June 16, 2020
    Publication date: January 14, 2021
    Inventors: CHIH-HSIEN HUANG, XIAODONG LIU, JIAN-ZHI FANG, CHEN-HAO LIU
  • Patent number: 8897821
    Abstract: A method for providing visual effect messages on a receiving end and associated transmitting end configuration is provided. At the transmitting end, visual effect positions and visual effects of messages are determined according to an input message. The visual effect positions and visual effect information are transmitted to the receiving end, and are displayed at the visual effect positions at the receiving end according to the visual information.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: November 25, 2014
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chih-Hsien Huang, Sheng-Chi Yu
  • Publication number: 20140190969
    Abstract: A tamper-evident container is disclosed. The tamper-evident container includes a containing base, a lid, and a release structure. The containing base has a base edge and the lid has a lid edge. The lid is fixed to the containing base for closing and the base edge encloses the lid edge. The release is disposed at the containing base. The release structure includes a barrier line and two break lines. The break lines are extended from two ends of the barrier line to the base edge. A detachable zone is encompassed by the barrier line, the break lines, and the base edge. The break lines are for detaching the detachable zone from the containing base, so that the lid edge is partially exposed so as to separate the lid from the containing base.
    Type: Application
    Filed: March 18, 2013
    Publication date: July 10, 2014
    Applicant: WEI MON INDUSTRY CO., LTD.
    Inventor: Chih-Hsien HUANG
  • Publication number: 20140190970
    Abstract: A tamper-evident container is disclosed. The tamper-evident container includes a containing base, a lid, and a release structure. The lid is fixed to the containing base for closing. The release structure is disposed at the lid or the containing base. The release structure comprises a break line and at least one hole. The hole is disposed on the break line and the break line is for separating the lid from the containing base.
    Type: Application
    Filed: March 18, 2013
    Publication date: July 10, 2014
    Applicant: WEI MON INDUSTRY CO., LTD.
    Inventor: Chih-Hsien HUANG
  • Patent number: 8723871
    Abstract: A method and apparatus for displaying a branch structure by emulating natural visual effects of a branch structure, e.g., lightning, is provided. The branch structure comprises branches each formed by segments. Each segment is generated by randomly providing a segment end position according to a segment start position, and randomly determining whether another branch is provided at each segment.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: May 13, 2014
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chih-Hsien Huang, Sheng-Chi Yu
  • Publication number: 20130295332
    Abstract: An method for manufacturing an imitation leather includes preparing an animal skin powder, blending the animal skin powder and a matrix to form the imitation plastic material and then the imitation plastic material being cooled and granulated to form granules and melting and feeding the granules of the imitation plastic material to a sheet extruding equipment to extrude the flexible sheet imitation leather. The animal skin powder comprises an animal epidermis powder and has a particle size of 0.2 um-0.3 mm. The matrix comprises an elastic material. The animal skin powder and the matrix are blended under a blending temperature between 100-160° C. and the animal skin powder is present in the imitation plastic material in an amount of 30-70 wt %, based on the total weight of the imitation plastic material.
    Type: Application
    Filed: May 7, 2012
    Publication date: November 7, 2013
    Inventors: Chih-Hsien Huang, Kuo-Hsiung Wang
  • Publication number: 20120289262
    Abstract: A method for providing visual effect messages on a receiving end and associated transmitting end configuration is provided. At the transmitting end, visual effect positions and visual effects of messages are determined according to an input message. The visual effect positions and visual effect information are transmitted to the receiving end, and are displayed at the visual effect positions at the receiving end according to the visual information.
    Type: Application
    Filed: April 19, 2012
    Publication date: November 15, 2012
    Applicant: MStar Semiconductor, Inc.
    Inventors: Chih-Hsien Huang, Sheng-Chi Yu
  • Publication number: 20120256907
    Abstract: A method and apparatus for displaying a branch structure by emulating natural visual effects of a branch structure, e.g., lightning, is provided. The branch structure comprises branches each formed by segments. Each segment is generated by randomly providing a segment end position according to a segment start position, and randomly determining whether another branch is provided at each segment.
    Type: Application
    Filed: November 28, 2011
    Publication date: October 11, 2012
    Applicant: MStar Semiconductor, Inc.
    Inventors: Chih-Hsien Huang, Sheng-Chi Yu
  • Publication number: 20120082184
    Abstract: A physiological signal sensing device, a containing device and a method for transporting a protective film are provided. The physiological sensing device includes a sensing module, a transporter, and a driving assembly. The sensing module is used for sensing vital signals. The transporter is used for transporting a protective film. The driving assembly includes a first structural member, a second structural member and a third structural member. One of the second and the third structural members selectively connects to the transporting device depending on the rotation direction of the first structural member for driving the transporter to transport the protective film from a starting site to an ending site.
    Type: Application
    Filed: September 29, 2011
    Publication date: April 5, 2012
    Inventors: Chun Liang LU, Chih-Hsien Huang, Yi-Hsin Huang, Chao-Wang Chen