Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.

Abstract: A semiconductor package structure includes a first substrate, a second substrate and an encapsulant. The first substrate comprises a plurality of first bumps and a plurality of first solder layers. Each of the first solder layers is formed on each of the first bumps and comprises a cone-shaped slot having an inner surface. The second substrate comprises a plurality of second bumps and a plurality of second solder layers. Each of the second solder layers is formed on each of the second bumps and comprises an outer surface. Each of the second solder layers is a cone-shaped body. The second solder layer couples to the first solder layer and is accommodated within the first solder layer. The inner surface of the cone-shaped slot contacts with the outer surface of the second solder layer. The encapsulant is formed between the first substrate and the second substrate.

Abstract: A semiconductor package includes a lead frame, at least one chip and a molding compound. The lead frame comprises a plurality of leads, each lead comprises a first end portion and at least one coupling protrusion, wherein the first end portion comprises a first upper surface, the coupling protrusion comprises a ring surface and is integrally formed as one piece with the first upper surface. The chip disposed on top of the leads comprises a plurality of bumps and a plurality of solders, the coupling protrusions embed into the solders to make the ring surfaces of the coupling protrusions cladded with the solders. The solders cover the first upper surfaces. The chip and the leads are cladded with the molding compound.

Abstract: A semiconductor package structure includes a first substrate, a second substrate and an encapsulant. The first substrate comprises a plurality of first bumps and a plurality of first solder layers. Each of the first solder layers is formed on each of the first bumps and comprises a cone-shaped slot having an inner surface. The second substrate comprises a plurality of second bumps and a plurality of second solder layers. Each of the second solder layers is formed on each of the second bumps and comprises an outer surface. Each of the second solder layers is a cone-shaped body. The second solder layer couples to the first solder layer and is accommodated within the first solder layer. The inner surface of the cone-shaped slot contacts with the outer surface of the second solder layer. The encapsulant is formed between the first substrate and the second substrate.

Abstract: A semiconductor package structure includes a first substrate, a second substrate and an encapsulant. The first substrate comprises a plurality of first bumps and a plurality of first solder layers. Each of the first solder layers is formed on each of the first bumps and comprises a cone-shaped slot having an inner surface. The second substrate comprises a plurality of second bumps and a plurality of second solder layers. Each of the second solder layers is formed on each of the second bumps and comprises an outer surface. Each of the second solder layers is a cone-shaped body. The second solder layer couples to the first solder layer and is accommodated within the first solder layer. The inner surface of the cone-shaped slot contacts with the outer surface of the second solder layer. The encapsulant is formed between the first substrate and the second substrate.

Abstract: A semiconductor package structure includes a first substrate, a second substrate and an encapsulant. The first substrate comprises a plurality of first bumps and a plurality of first solder layers. Each of the first solder layers is formed on each of the first bumps and comprises a cone-shaped slot having an inner surface. The second substrate comprises a plurality of second bumps and a plurality of second solder layers. Each of the second solder layers is formed on each of the second bumps and comprises an outer surface. Each of the second solder layers is a cone-shaped body. The second solder layer couples to the first solder layer and is accommodated within the first solder layer. The inner surface of the cone-shaped slot contacts with the outer surface of the second solder layer. The encapsulant is formed between the first substrate and the second substrate.

Abstract: A semiconductor package includes a lead frame, at least one chip and a molding compound. The lead frame comprises a plurality of leads, each lead comprises a first end portion and at least one coupling protrusion, wherein the first end portion comprises a first upper surface, the coupling protrusion comprises a ring surface and is integrally formed as one piece with the first upper surface. The chip disposed on top of the leads comprises a plurality of bumps and a plurality of solders, the coupling protrusions embed into the solders to make the ring surfaces of the coupling protrusions cladded with the solders. The solders cover the first upper surfaces. The chip and the leads are cladded with the molding compound.

Abstract: A semiconductor package structure comprises a lead frame, at least one chip, a molding compound and an anti-conduction film. The lead frame comprises a plurality of leads, each of the leads comprises a first end portion and a second end portion, wherein the first end portion comprises a first upper surface and a first lower surface, and the second end portion comprises a second upper surface and a second lower surface. The chip comprises a plurality of bumps electrically connected with the lead frame. The chip and the leads are covered with the molding compound. The first lower surface of each of the first end portions and the second lower surface of each of the second end portions are exposed by the molding compound. The first lower surface of the first end portion of each of the leads is covered with the anti-conduction film.

Abstract: A semiconductor package structure comprises a lead frame, at least one chip, a molding compound and an anti-conduction film. The lead frame comprises a plurality of leads, each of the leads comprises a first end portion and a second end portion, wherein the first end portion comprises a first upper surface and a first lower surface, and the second end portion comprises a second upper surface and a second lower surface. The chip comprises a plurality of bumps electrically connected with the lead frame. The chip and the leads are covered with the molding compound. The first lower surface of each of the first end portions and the second lower surface of each of the second end portions are exposed by the molding compound. The first lower surface of the first end portion of each of the leads is covered with the anti-conduction film.