Patents by Inventor Chih-Hsien Tang

Chih-Hsien Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960203
    Abstract: A method of forming patterns on a substrate by double nanoimprint processes includes providing a first replicate mold and a second replicate mold. The first replicate mold includes numerous first patterns. The second replicate mold includes at least one second pattern. The second pattern corresponds to at least one of the first patterns. Later, a first substrate is provided. A first polymeric compound layer is coated on the first substrate. Next, the first patterns are nanoimprinted into the first polymeric compound layer. Subsequently, the first substrate is etched by taking the first polymeric compound layer as a mask. After that, a second polymeric compound layer is coated on the first substrate. Later, the second pattern is nanoimprinted into the second polymeric compound layer. Finally, the first substrate is etched by taking the second polymeric compound layer as a mask.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: April 16, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Chieh Lai, Chih-Hsien Tang
  • Publication number: 20240063023
    Abstract: A patterning process is provided. The patterning process comprises the following steps. A material layer is formed on a substrate. An imprinting process is performed on the material layer using an imprint stamp to form a patterned material layer having a plurality of pattern portions. A hard mask layer is formed between adjacent pattern portions. An etching process is performed using the hard mask layer as an etching mask to remove the pattern portions and a part of the substrate. The hard mask layer is removed.
    Type: Application
    Filed: September 19, 2022
    Publication date: February 22, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Teng Yao Chang, Chih-Hsien Tang
  • Publication number: 20230358605
    Abstract: A matching method of light source parameters includes the following. First light source parameter data of a first exposure machine and second light source parameter data of a second exposure machine corresponding to the first light source parameter data are collected. Whether a second light intensity distribution included in the second light source parameter data meets a first light intensity distribution included in the first light source parameter data is determined. If the second light intensity distribution meets the first light intensity distribution, a simulated exposure process is performed by using the first light source parameter data and the second light source parameter data. Second simulated exposure data obtained by using the second light source parameter data is compared with first simulated exposure data obtained by using the first light source parameter data to determine whether the second simulated exposure data meets the first simulated exposure data.
    Type: Application
    Filed: May 24, 2022
    Publication date: November 9, 2023
    Applicant: United Microelectronics Corp.
    Inventors: Sheng Lung Teng, Guo Xin Hu, Chih-Hsien Tang
  • Publication number: 20230350287
    Abstract: An imprint method includes the following steps. A first resist layer is formed on a first substrate. A first imprinting step using a first mold is performed to the first resist layer. A first etching process is performed to the first substrate with the first resist layer as an etching mask after the first imprinting step so as to form a first recess pattern in the first substrate. A second resist layer is formed on the first substrate. A second imprinting step using a second mold is performed to the second resist layer. A second etching process is performed to the first substrate with the second resist layer as an etching mask after the second imprinting step so as to form second recess patterns in the first substrate. A depth of the first recess pattern is greater than a depth of each of the second recess patterns.
    Type: Application
    Filed: May 23, 2022
    Publication date: November 2, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Su-Yun Fang, Chih-Hsien Tang, Yi-Lin Tsai
  • Publication number: 20230350286
    Abstract: A method of forming patterns on a substrate by double nanoimprint processes includes providing a first replicate mold and a second replicate mold. The first replicate mold includes numerous first patterns. The second replicate mold includes at least one second pattern. The second pattern corresponds to at least one of the first patterns. Later, a first substrate is provided. A first polymeric compound layer is coated on the first substrate. Next, the first patterns are nanoimprinted into the first polymeric compound layer. Subsequently, the first substrate is etched by taking the first polymeric compound layer as a mask. After that, a second polymeric compound layer is coated on the first substrate. Later, the second pattern is nanoimprinted into the second polymeric compound layer. Finally, the first substrate is etched by taking the second polymeric compound layer as a mask.
    Type: Application
    Filed: May 19, 2022
    Publication date: November 2, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Chieh Lai, Chih-Hsien Tang
  • Patent number: 10714466
    Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes: a first magnetic tunneling junction (MTJ) pattern on a substrate; a second MTJ pattern adjacent to the first MTJ pattern; and a first metal interconnection pattern between the first MTJ pattern and the second MTJ pattern, wherein the first MTJ pattern, the first metal interconnection pattern, and the second MTJ pattern comprise a staggered arrangement.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: July 14, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Liang Chu, Chih-Hsien Tang, Yu-Ruei Chen, Ya-Huei Tsai, Rai-Min Huang, Chueh-Fei Tai
  • Publication number: 20200212030
    Abstract: A layout pattern for magnetoresistive random access memory (MRAM) includes: a first magnetic tunneling junction (MTJ) pattern on a substrate; a second MTJ pattern adjacent to the first MTJ pattern; and a first metal interconnection pattern between the first MTJ pattern and the second MTJ pattern, wherein the first MTJ pattern, the first metal interconnection pattern, and the second MTJ pattern comprise a staggered arrangement.
    Type: Application
    Filed: January 23, 2019
    Publication date: July 2, 2020
    Inventors: Chung-Liang Chu, Chih-Hsien Tang, Yu-Ruei Chen, Ya-Huei Tsai, Rai-Min Huang, Chueh-Fei Tai
  • Patent number: 9672309
    Abstract: A method for generating a layout pattern includes following steps. A basic layout pattern including a plurality of first stripe patterns in a first cluster region is provided. Each first stripe pattern extends in a first direction, and the first stripe patterns have equal pitches in a second direction. A plurality of anchor bar patterns are generated. Each anchor bar pattern extends in the first direction, and the anchor bar patterns have equal pitches in the second direction. Edges of at least one of the anchor bar patterns in the second direction are aligned with edges of two adjacent first stripe patterns respectively. At least one of the anchor bar patterns overlaps a first space between two adjacent first stripe patterns. At least one first mandrel pattern is generated at the first space overlapped by the anchor bar pattern, and the first mandrel pattern is outputted to a photomask.
    Type: Grant
    Filed: April 27, 2015
    Date of Patent: June 6, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Harn-Jiunn Wang, Teng-Yao Chang, Chin-Lung Lin, Chih-Hsien Tang, Yao-Jen Fan
  • Patent number: 9529254
    Abstract: A layout pattern decomposition method includes following steps. A layout pattern is received. The layout pattern includes a plurality of features, and an edge-to-edge space is respectively defined in between two adjacent features. A sum of a width of the edge-to-edge space and a width of the feature on a left side of the edge-to-edge space and a sum of the width of the edge-to-edge space and a width of the feature on a right side of the edge-to-edge space are respectively calculated. The sums and a predetermined value are respectively compared. When any one of the sums is smaller than the predetermined value, the two features on the two sides of the edge-to-edge space are colored by a first color and alternatively a second color. The features including the first color are assigned to a first pattern and the features including the second color to a second pattern.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: December 27, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Hsien Tang, Yao-Jen Fan, Chin-Lung Lin
  • Patent number: 9524362
    Abstract: A method of decomposing pattern layout for generating patterns on photomasks is disclosed. The method includes decomposing features of an integrated circuit layout into discrete patterns based on the relation between these features. The features include first features and second features. The first features are then classified into a first feature pattern and a second feature pattern, and the second features are classified into third, fourth, fifth and sixth feature patterns. The spacings of the second features in the fifth and sixth feature patterns are greater than a minimum exposure limits. Finally, the first feature pattern is outputted to a first photomask, the second feature pattern is outputted to a second photomask, the third and fifth feature patterns are outputted to a third photomask, and the fourth and sixth feature patterns are outputted to a fourth photomask.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: December 20, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Harn-Jiunn Wang, Kuei-Chun Hung, Chih-Hsien Tang, Chin-Lung Lin
  • Publication number: 20160314233
    Abstract: A method of decomposing pattern layout for generating patterns on photomasks is disclosed. The method includes decomposing features of an integrated circuit layout into discrete patterns based on the relation between these features. The features include first features and second features. The first features are then classified into a first feature pattern and a second feature pattern, and the second features are classified into third, fourth, fifth and sixth feature patterns. The spacings of the second features in the fifth and sixth feature patterns are greater than a minimum exposure limits. Finally, the first feature pattern is outputted to a first photomask, the second feature pattern is outputted to a second photomask, the third and fifth feature patterns are outputted to a third photomask, and the fourth and sixth feature patterns are outputted to a fourth photomask.
    Type: Application
    Filed: April 21, 2015
    Publication date: October 27, 2016
    Inventors: Harn-Jiunn Wang, Kuei-Chun Hung, Chih-Hsien Tang, Chin-Lung Lin
  • Publication number: 20160275226
    Abstract: A method for generating a layout pattern includes following steps. A basic layout pattern including a plurality of first stripe patterns in a first cluster region is provided. Each first stripe pattern extends in a first direction, and the first stripe patterns have equal pitches in a second direction. A plurality of anchor bar patterns are generated. Each anchor bar pattern extends in the first direction, and the anchor bar patterns have equal pitches in the second direction. Edges of at least one of the anchor bar patterns in the second direction are aligned with edges of two adjacent first stripe patterns respectively. At least one of the anchor bar patterns overlaps a first space between two adjacent first stripe patterns. At least one first mandrel pattern is generated at the first space overlapped by the anchor bar pattern, and the first mandrel pattern is outputted to a photomask.
    Type: Application
    Filed: April 27, 2015
    Publication date: September 22, 2016
    Inventors: Harn-Jiunn Wang, Teng-Yao Chang, Chin-Lung Lin, Chih-Hsien Tang, Yao-Jen Fan
  • Patent number: 9268896
    Abstract: A method of forming a photomask comprises providing a predetermined fin array having a plurality of fin patterns to a computer readable medium in a computer system. First of all, a plurality of width markers is defined by using the computer system, with each of the width marker parallel to each other and comprising two fin patterns, wherein each of the width markers is spaced from each other by a space. Then, a number of the width markers is checked to be an even. Following this, a plurality of pre-mandrel patterns is defined corresponding to odd numbered ones of the spaces. Then, a plurality of mandrel patterns is defined by sizing up the pre-mandrel patterns. Finally, the mandrel patterns are outputted to form a photomask.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: February 23, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Hsien Tang, Shih-Hung Tsai, Chun-Hsien Huang, Yao-Jen Fan
  • Publication number: 20160048072
    Abstract: A layout pattern decomposition method includes following steps. A layout pattern is received. The layout pattern includes a plurality of features, and an edge-to-edge space is respectively defined in between two adjacent features. A sum of a width of the edge-to-edge space and a width of the feature on a left side of the edge-to-edge space and a sum of the width of the edge-to-edge space and a width of the feature on a right side of the edge-to-edge space are respectively calculated. The sums and a predetermined value are respectively compared. When any one of the sums is smaller than the predetermined value, the two features on the two sides of the edge-to-edge space are colored by a first color and alternatively a second color. The features including the first color are assigned to a first pattern and the features including the second color to a second pattern.
    Type: Application
    Filed: October 1, 2014
    Publication date: February 18, 2016
    Inventors: Chih-Hsien Tang, Yao-Jen Fan, Chin-Lung Lin
  • Publication number: 20060240342
    Abstract: In one embodiment, a spacing is determined for each edge of a number of features in a photolithographic design. The edges have at least a partially predictable layout. Based on the spacing and the predictable layout, a bridge structure is generated. Each bridge of the bridge structure connects one of the edges to an edge of a neighboring feature. Then, the features and the bridge structure are provided for a phase assignment. The phase assignment assigns features at opposite ends of each bridge in the bridge structure to opposite phases. In another embodiment, a sub-resolution assist feature (SRAF) is introduced for an edge of a feature and a bridge is generated from the feature to the SRAF. Then, the feature and the SRAF are assigned to opposite phases based on the relationship defined by the bridge.
    Type: Application
    Filed: June 26, 2006
    Publication date: October 26, 2006
    Inventor: Chih-Hsien Tang
  • Publication number: 20050149901
    Abstract: In one embodiment, a spacing is determined for each edge of a number of features in a photolithographic design. The edges have at least a partially predictable layout. Based on the spacing and the predictable layout, a bridge structure is generated. Each bridge of the bridge structure connects one of the edges to an edge of a neighboring feature. Then, the features and the bridge structure are provided for a phase assignment. The phase assignment assigns features at opposite ends of each bridge in the bridge structure to opposite phases. In another embodiment, a sub-resolution assist feature (SRAF) is introduced for an edge of a feature and a bridge is generated from the feature to the SRAF. Then, the feature and the SRAF are assigned to opposite phases based on the relationship defined by the bridge.
    Type: Application
    Filed: December 6, 2004
    Publication date: July 7, 2005
    Inventor: Chih-Hsien Tang