Patents by Inventor Chih-Hsing Hsin

Chih-Hsing Hsin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6636312
    Abstract: A vernier having multi-pitch for checking alignment accuracy. The vernier has the same pitch as the line width of the IC pattern where the diffraction angle of the vernier is the same as that of the IC pattern. The pitch comprises slits which cannot produce image on the wafer, such that a simultaneous pattern with the conventional pattern on the wafer is formed. Accordingly, the alignment accuracy can be accurately checked, thereby monitoring the alignment of IC patterns.
    Type: Grant
    Filed: March 8, 2000
    Date of Patent: October 21, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Hsing Hsin, Wen-Bin Shieh
  • Publication number: 20020153478
    Abstract: The present invention provides a method for preventing cross-talk of incident light in a photosensor device. The photosensor device is formed on the substrate of a semiconductor wafer and comprises a plurality of MOS transistor sensors. The present invention first involves forming a dielectric layer on the semiconductor wafer, which covers each MOS transistor sensor. Thereafter, a plurality of shallow trenches are formed in the dielectric layer, followed by the formation of a barrier layer on the surface of the dielectric layer and on the inner surface of each shallow trench. Then, a metal layer is formed on the surface of the barrier layer and fills each shallow trench. Finally, a chemical mechanical polishing (CMP) process is performed to remove both the barrier layer and the metal layer from each shallow trench. The metal layer in each shallow trench is used to prevent cross-talk from occurring in each MOS transistor sensor in the photosensor device.
    Type: Application
    Filed: April 18, 2001
    Publication date: October 24, 2002
    Inventor: Chih-Hsing Hsin
  • Publication number: 20020102498
    Abstract: A passivation layer, a color filter layer and a planner layer are formed in order on a substrate. Afterward, a plurality of photoresist layers are defined on the planner layer, wherein a plurality of photoresist layers are formed at a predetermined distance from each other. Subsequently, the planner layer is etched by means of a plurality of photoresist layers as a plurality of etched mask, so as to curve downward the surface of the planner layer. Next, forming a microlens layer on the planner layer and concave surface thereof. The microlens layer is then expose to light by using conventional lithography process to form a plurality of microlens regions. Final, a plurality of biconvex microlens that have lenticular shapes are formed by treating a plurality of microlens regions with a thermal process.
    Type: Application
    Filed: January 31, 2001
    Publication date: August 1, 2002
    Inventor: Chih-Hsing Hsin
  • Patent number: 5773082
    Abstract: A method for applying photoresist on a wafer is disclosed. The method comprises: lowering the temperature of the photoresist, and dispensing the photoresist on a portion of the wafer, where the wafer is supported by a spinner chuck and is rotated at a low speed. Thereafter, spreading the photoresist on the wafer by rotating the wafer at a high speed. Finally, planarizing the photoresist by rotating the wafer at a medium speed greater than or equal to the low speed in the dispensing step and less than or equal to the high speed in the spreading step.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: June 30, 1998
    Assignee: United Microelectronics Corp.
    Inventors: Chi-Fa Ku, Chih-Hsing Hsin, Po-Wen Yen