Abstract: An electrostatic discharge protection circuit is provided. The electrostatic discharge protection circuit includes first, second, and third transistors and a discharge circuit. The first transistor has a first gate, a first drain coupled to the bonding pad, and a first source coupled to a first node. The second transistor has a second gate coupled to a power terminal, a second drain coupled to the first gate, and a second source coupled to a ground. The third transistor has a third gate coupled to the power terminal, a third drain coupled to the first node, and a third source coupled to the ground. The discharge circuit is controlled by a driving voltage at the first node. In response to an electrostatic discharge event occurring on the bonding pad, the discharge circuit provides a discharge path between the bonding pad and the ground according to the driving voltage.

Abstract: A power system including a first battery pack, a second battery pack, and a power management circuit is disclosed. The first battery pack has a first end and a second end, and has a first battery capacity. The second battery pack has a third end and a fourth end. The third end is coupled to the second end of the first battery pack and provides a low battery voltage. The fourth end is grounded, the second battery pack has a second battery capacity, and the second battery capacity is greater than the first battery capacity. The power management circuit is coupled to the second battery pack to receive the low battery voltage, and provides a component operating voltage to an electronic components based on the low battery voltage.

Abstract: An antenna module includes a first metal plate and a frame body. The frame body surrounds the first metal plate. The frame body includes a first antenna radiator, a second antenna radiator, a third antenna radiator, a first breakpoint and a second breakpoint. The first antenna radiator includes a first feeding end and excites a first frequency band. The second antenna radiator includes a second feeding end and excites a second frequency band. The third antenna radiator includes a third feeding end and excites a third frequency band. The first breakpoint is located between the first antenna radiator and the second antenna radiator. The second breakpoint is located between the second antenna radiator and the third antenna radiator. An electronic device including the above-mentioned antenna module is also provided.

Abstract: Disclosed is a tungsten-doped lithium manganese iron phosphate-based particulate for a cathode of a lithium-ion battery. The particulates include a composition represented by a formula of LixMn0.998-y-zFeyMzW0.002PaO4a±p/C, wherein x, y, z, a, p, and M are as defined herein. Also disclosed is a powdery material including the particulates, and a method for preparing the powdery material.

Abstract: A method of fabricating a device includes providing a fin element in a device region and forming a dummy gate over the fin element. In some embodiments, the method further includes forming a source/drain feature within a source/drain region adjacent to the dummy gate. In some cases, the source/drain feature includes a bottom region and a top region contacting the bottom region at an interface interposing the top and bottom regions. In some embodiments, the method further includes performing a plurality of dopant implants into the source/drain feature. In some examples, the plurality of dopant implants includes implantation of a first dopant within the bottom region and implantation of a second dopant within the top region. In some embodiments, the first dopant has a first graded doping profile within the bottom region, and the second dopant has a second graded doping profile within the top region.

Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.

Abstract: A package structure includes a thermal dissipation structure, a first encapsulant, a die, a through integrated fan-out via (TIV), a second encapsulant, and a redistribution layer (RDL) structure. The thermal dissipation structure includes a substrate and a first conductive pad disposed over the substrate. The first encapsulant laterally encapsulates the thermal dissipation structure. The die is disposed on the thermal dissipation structure. The TIV lands on the first conductive pad of the thermal dissipation structure and is laterally aside the die. The second encapsulant laterally encapsulates the die and the TIV. The RDL structure is disposed on the die and the second encapsulant.

Abstract: A pixel array and a pixel unit thereof adapted in a display panel are provided. The pixel array includes a plurality of pixel units, and each pixel unit includes a first gate line, a second gate line, a data line, a first sub-pixel, a second sub-pixel and a third sub-pixel. The first sub-pixel is electrically connected to the second gate line and electrically connected to the data line through the third sub-pixel. The second sub-pixel is electrically connected to the second gate line and the data line. The third sub-pixel is electrically connected to the first gate line and the data line.

Abstract: A pixel array and a pixel unit thereof adapted in a display panel are provided. The pixel array includes a plurality of pixel units, and each pixel unit includes a first gate line, a second gate line, a data line, a first sub-pixel, a second sub-pixel and a third sub-pixel. The first sub-pixel is electrically connected to the second gate line and electrically connected to the data line through the third sub-pixel. The second sub-pixel is electrically connected to the second gate line and the data line. The third sub-pixel is electrically connected to the first gate line and the data line.